diff mbox series

arm64: qcom: qcs8300: Add ADSP and CDSP0 fastrpc nodes

Message ID 20241112074945.2615209-1-quic_lxu5@quicinc.com (mailing list archive)
State Superseded
Headers show
Series arm64: qcom: qcs8300: Add ADSP and CDSP0 fastrpc nodes | expand

Commit Message

Ling Xu Nov. 12, 2024, 7:49 a.m. UTC 
Add ADSP and CDSP0 fastrpc nodes for QCS8300 platform.

Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
---
This patch depends on patch https://lore.kernel.org/all/20240904-qcs8300_initial_dtsi-v1-0-d0ea9afdc007@quicinc.com/#t
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 85 +++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

Comments

Konrad Dybcio Nov. 12, 2024, 11:27 a.m. UTC | #1 
On 12-Nov-24 08:49, Ling Xu wrote:
> Add ADSP and CDSP0 fastrpc nodes for QCS8300 platform.
> 
> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
> ---

[...]


> +				fastrpc {
> +					compatible = "qcom,fastrpc";
> +					qcom,glink-channels = "fastrpcglink-apps-dsp";
> +					label = "cdsp";
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					compute-cb@1 {
> +						compatible = "qcom,fastrpc-compute-cb";
> +						reg = <1>;
> +						iommus = <&apps_smmu 0x19c1 0x0440>,
> +							 <&apps_smmu 0x1dc1 0x0440>,
> +							 <&apps_smmu 0x1961 0x0400>,
> +							 <&apps_smmu 0x1d61 0x0400>,
> +							 <&apps_smmu 0x1981 0x0440>,
> +							 <&apps_smmu 0x1d81 0x0440>;

If you do SID & ~MASK, many of these come out to the same
value. Could you try to simplify the entries?

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 2c35f96c3f28..af3e9ae2bc48 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -762,6 +762,35 @@  IPCC_MPROC_SIGNAL_GLINK_QMP
 
 				label = "lpass";
 				qcom,remote-pid = <2>;
+
+				fastrpc {
+					compatible = "qcom,fastrpc";
+					qcom,glink-channels = "fastrpcglink-apps-dsp";
+					label = "adsp";
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					compute-cb@3 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <3>;
+						iommus = <&apps_smmu 0x2003 0x0>;
+						dma-coherent;
+					};
+
+					compute-cb@4 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <4>;
+						iommus = <&apps_smmu 0x2004 0x0>;
+						dma-coherent;
+					};
+
+					compute-cb@5 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <5>;
+						iommus = <&apps_smmu 0x2005 0x0>;
+						dma-coherent;
+					};
+				};
 			};
 		};
 
@@ -1361,6 +1390,62 @@  IPCC_MPROC_SIGNAL_GLINK_QMP
 
 				label = "cdsp";
 				qcom,remote-pid = <5>;
+
+				fastrpc {
+					compatible = "qcom,fastrpc";
+					qcom,glink-channels = "fastrpcglink-apps-dsp";
+					label = "cdsp";
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					compute-cb@1 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <1>;
+						iommus = <&apps_smmu 0x19c1 0x0440>,
+							 <&apps_smmu 0x1dc1 0x0440>,
+							 <&apps_smmu 0x1961 0x0400>,
+							 <&apps_smmu 0x1d61 0x0400>,
+							 <&apps_smmu 0x1981 0x0440>,
+							 <&apps_smmu 0x1d81 0x0440>;
+						dma-coherent;
+					};
+
+					compute-cb@2 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <2>;
+						iommus = <&apps_smmu 0x19c2 0x0440>,
+							 <&apps_smmu 0x1dc2 0x0440>,
+							 <&apps_smmu 0x1962 0x0400>,
+							 <&apps_smmu 0x1d62 0x0400>,
+							 <&apps_smmu 0x1982 0x0440>,
+							 <&apps_smmu 0x1d82 0x0440>;
+						dma-coherent;
+					};
+
+					compute-cb@3 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <3>;
+						iommus = <&apps_smmu 0x19c3 0x0440>,
+							 <&apps_smmu 0x1dc3 0x0440>,
+							 <&apps_smmu 0x1963 0x0400>,
+							 <&apps_smmu 0x1d63 0x0400>,
+							 <&apps_smmu 0x1983 0x0440>,
+							 <&apps_smmu 0x1d83 0x0440>;
+						dma-coherent;
+					};
+
+					compute-cb@4 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <4>;
+						iommus = <&apps_smmu 0x19c4 0x0440>,
+							 <&apps_smmu 0x1dc4 0x0440>,
+							 <&apps_smmu 0x1964 0x0400>,
+							 <&apps_smmu 0x1d64 0x0400>,
+							 <&apps_smmu 0x1984 0x0440>,
+							 <&apps_smmu 0x1d84 0x0440>;
+						dma-coherent;
+					};
+				};
 			};
 		};
 	};