| Message ID | 20241119060754.3350320-3-quic_varada@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | qcom: ipq5424: Add LLCC/system-cache-controller | expand |
On Tue, Nov 19, 2024 at 11:37:53AM +0530, Varadarajan Narayanan wrote: > The 'broadcast' register space is present only in chipsets that > have multiple instances of LLCC IP. Since IPQ5424 has only one > instance, both the LLCC and LLCC_BROADCAST points to the same > register space. > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > --- > v3: Rebase to ToT > Remove 'need_llcc_cfg = true' > > v2: Use 'true/false' instead of '1/0' for boolean variables. > Add 'no_broadcast_register' to qcom_llcc_config structure > to identify SoC without LLCC_BROADCAST register space instead > of using 'num_banks'. > --- > drivers/soc/qcom/llcc-qcom.c | 57 ++++++++++++++++++++++++++++++++++-- > 1 file changed, 55 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index 32c3bc887cef..106f2619277a 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -142,6 +142,7 @@ struct qcom_llcc_config { > bool skip_llcc_cfg; > bool no_edac; > bool irq_configured; > + bool no_broadcast_register; > }; > > struct qcom_sct_config { > @@ -154,6 +155,38 @@ enum llcc_reg_offset { > LLCC_COMMON_STATUS0, > }; > > +static const struct llcc_slice_config ipq5424_data[] = { > + { > + .usecase_id = LLCC_CPUSS, > + .slice_id = 1, > + .max_cap = 768, > + .priority = 1, > + .bonus_ways = 0xFFFF, > + .retain_on_pc = true, > + .activate_on_init = true, > + .write_scid_cacheable_en = true, > + .stale_en = true, > + .stale_cap_en = true, > + .alloc_oneway_en = true, > + .ovcap_en = true, > + .ovcap_prio = true, > + .vict_prio = true, > + }, > + { > + .usecase_id = LLCC_VIDSC0, > + .slice_id = 2, > + .max_cap = 256, > + .priority = 2, > + .fixed_size = true, > + .bonus_ways = 0xF000, > + .retain_on_pc = true, > + .activate_on_init = true, > + .write_scid_cacheable_en = true, > + .stale_en = true, > + .stale_cap_en = true, > + }, > +}; > + > static const struct llcc_slice_config sa8775p_data[] = { > { > .usecase_id = LLCC_CPUSS, > @@ -3185,6 +3218,16 @@ static const struct qcom_llcc_config qdu1000_cfg[] = { > }, > }; > > +static const struct qcom_llcc_config ipq5424_cfg[] = { > + { > + .sct_data = ipq5424_data, > + .size = ARRAY_SIZE(ipq5424_data), > + .reg_offset = llcc_v2_1_reg_offset, > + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, > + .no_broadcast_register = true, > + }, > +}; > + > static const struct qcom_llcc_config sa8775p_cfg[] = { > { > .sct_data = sa8775p_data, > @@ -3360,6 +3403,11 @@ static const struct qcom_sct_config qdu1000_cfgs = { > .num_config = ARRAY_SIZE(qdu1000_cfg), > }; > > +static const struct qcom_sct_config ipq5424_cfgs = { > + .llcc_config = ipq5424_cfg, > + .num_config = ARRAY_SIZE(ipq5424_cfg), > +}; > + > static const struct qcom_sct_config sa8775p_cfgs = { > .llcc_config = sa8775p_cfg, > .num_config = ARRAY_SIZE(sa8775p_cfg), > @@ -3957,8 +4005,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) > > drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); > if (IS_ERR(drv_data->bcast_regmap)) { > - ret = PTR_ERR(drv_data->bcast_regmap); > - goto err; > + if (cfg->no_broadcast_register) { > + drv_data->bcast_regmap = regmap; > + } else { > + ret = PTR_ERR(drv_data->bcast_regmap); > + goto err; > + } > } > > /* Extract version of the IP */ > @@ -4032,6 +4084,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { > { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, > { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, > { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, > + { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, I wonder why is this getting inserted at this point. The list is sorted and your entry definitely is not in the correct place. Please review if your addition is breaking sorting order in other places too. > { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, > { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, > { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs }, > -- > 2.34.1 >
On Wed, Nov 20, 2024 at 02:40:41PM +0200, Dmitry Baryshkov wrote: > On Tue, Nov 19, 2024 at 11:37:53AM +0530, Varadarajan Narayanan wrote: > > The 'broadcast' register space is present only in chipsets that > > have multiple instances of LLCC IP. Since IPQ5424 has only one > > instance, both the LLCC and LLCC_BROADCAST points to the same > > register space. > > > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > > --- > > v3: Rebase to ToT > > Remove 'need_llcc_cfg = true' > > > > v2: Use 'true/false' instead of '1/0' for boolean variables. > > Add 'no_broadcast_register' to qcom_llcc_config structure > > to identify SoC without LLCC_BROADCAST register space instead > > of using 'num_banks'. > > --- > > drivers/soc/qcom/llcc-qcom.c | 57 ++++++++++++++++++++++++++++++++++-- > > 1 file changed, 55 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > > index 32c3bc887cef..106f2619277a 100644 > > --- a/drivers/soc/qcom/llcc-qcom.c > > +++ b/drivers/soc/qcom/llcc-qcom.c [ . . . ] > > /* Extract version of the IP */ > > @@ -4032,6 +4084,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { > > { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, > > { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, > > { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, > > + { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, > > I wonder why is this getting inserted at this point. The list is sorted > and your entry definitely is not in the correct place. > > Please review if your addition is breaking sorting order in other places > too. Sorry, have fixed this here and in the dt-bindings yaml file and posted v4. Please review. Thanks Varada > > { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, > > { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, > > { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 32c3bc887cef..106f2619277a 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -142,6 +142,7 @@ struct qcom_llcc_config { bool skip_llcc_cfg; bool no_edac; bool irq_configured; + bool no_broadcast_register; }; struct qcom_sct_config { @@ -154,6 +155,38 @@ enum llcc_reg_offset { LLCC_COMMON_STATUS0, }; +static const struct llcc_slice_config ipq5424_data[] = { + { + .usecase_id = LLCC_CPUSS, + .slice_id = 1, + .max_cap = 768, + .priority = 1, + .bonus_ways = 0xFFFF, + .retain_on_pc = true, + .activate_on_init = true, + .write_scid_cacheable_en = true, + .stale_en = true, + .stale_cap_en = true, + .alloc_oneway_en = true, + .ovcap_en = true, + .ovcap_prio = true, + .vict_prio = true, + }, + { + .usecase_id = LLCC_VIDSC0, + .slice_id = 2, + .max_cap = 256, + .priority = 2, + .fixed_size = true, + .bonus_ways = 0xF000, + .retain_on_pc = true, + .activate_on_init = true, + .write_scid_cacheable_en = true, + .stale_en = true, + .stale_cap_en = true, + }, +}; + static const struct llcc_slice_config sa8775p_data[] = { { .usecase_id = LLCC_CPUSS, @@ -3185,6 +3218,16 @@ static const struct qcom_llcc_config qdu1000_cfg[] = { }, }; +static const struct qcom_llcc_config ipq5424_cfg[] = { + { + .sct_data = ipq5424_data, + .size = ARRAY_SIZE(ipq5424_data), + .reg_offset = llcc_v2_1_reg_offset, + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, + .no_broadcast_register = true, + }, +}; + static const struct qcom_llcc_config sa8775p_cfg[] = { { .sct_data = sa8775p_data, @@ -3360,6 +3403,11 @@ static const struct qcom_sct_config qdu1000_cfgs = { .num_config = ARRAY_SIZE(qdu1000_cfg), }; +static const struct qcom_sct_config ipq5424_cfgs = { + .llcc_config = ipq5424_cfg, + .num_config = ARRAY_SIZE(ipq5424_cfg), +}; + static const struct qcom_sct_config sa8775p_cfgs = { .llcc_config = sa8775p_cfg, .num_config = ARRAY_SIZE(sa8775p_cfg), @@ -3957,8 +4005,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { - ret = PTR_ERR(drv_data->bcast_regmap); - goto err; + if (cfg->no_broadcast_register) { + drv_data->bcast_regmap = regmap; + } else { + ret = PTR_ERR(drv_data->bcast_regmap); + goto err; + } } /* Extract version of the IP */ @@ -4032,6 +4084,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, + { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
The 'broadcast' register space is present only in chipsets that have multiple instances of LLCC IP. Since IPQ5424 has only one instance, both the LLCC and LLCC_BROADCAST points to the same register space. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- v3: Rebase to ToT Remove 'need_llcc_cfg = true' v2: Use 'true/false' instead of '1/0' for boolean variables. Add 'no_broadcast_register' to qcom_llcc_config structure to identify SoC without LLCC_BROADCAST register space instead of using 'num_banks'. --- drivers/soc/qcom/llcc-qcom.c | 57 ++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-)