diff mbox series

[v3,3/3] arm64: dts: qcom: qcs8300-ride: Add watchdog node

Message ID 20241125093503.1162412-4-quic_liuxin@quicinc.com (mailing list archive)
State New
Headers show
Series Enable Watchdog on QCS8300 | expand

Commit Message

Xin Liu Nov. 25, 2024, 9:35 a.m. UTC
Add watchdog clock on the Qualcomm QCS8300 Ride platform.

Signed-off-by: Xin Liu <quic_liuxin@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Dmitry Baryshkov Nov. 25, 2024, 4:45 p.m. UTC | #1
On Mon, Nov 25, 2024 at 05:35:03PM +0800, Xin Liu wrote:
> Add watchdog clock on the Qualcomm QCS8300 Ride platform.
> 
> Signed-off-by: Xin Liu <quic_liuxin@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
> index 7eed19a694c3..d4e4c7a8b453 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
> @@ -265,3 +265,7 @@ &ufs_mem_phy {
>  	vdda-pll-supply = <&vreg_l5a>;
>  	status = "okay";
>  };
> +
> +&watchdog {
> +    clocks = <&sleep_clk>;
> +};

I'd really prefer to have this in the SoC dtsi. It's not a part that can
change between boards.
Xin Liu Nov. 26, 2024, 3:14 a.m. UTC | #2
在 2024/11/26 0:45, Dmitry Baryshkov 写道:
> I'd really prefer to have this in the SoC dtsi. It's not a part that can
> change between boards.

I think you're right, this clock won't change because of the board The 
reason for placing it on the board is that sleep_clk is defined on the 
board. The following link is the suggestion you once provided:
https://lore.kernel.org/all/4kopdkvbkrpcpzwteezm427ml5putqvzsnfkpmg76spsple7l5@mg7v3ihwxnit/
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index 7eed19a694c3..d4e4c7a8b453 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -265,3 +265,7 @@  &ufs_mem_phy {
 	vdda-pll-supply = <&vreg_l5a>;
 	status = "okay";
 };
+
+&watchdog {
+    clocks = <&sleep_clk>;
+};