| Message ID | 20241128-qcs8300_initial_dtsi-v3-4-26aa8a164914@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add initial support for QCS8300 SoC and QCS8300 RIDE board | expand |
On Thu, Nov 28, 2024 at 04:44:46PM +0800, Jingyi Wang wrote: > Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs, > UFS and booting to shell with uart console. > > Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu > (added ufs, adsp and gpdsp nodes). > > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 2 +- > arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 267 ++++++++++++++++++++++++++++++ > 2 files changed, 268 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 9bb8b191aeb5..d9545743606a 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts > new file mode 100644 > index 000000000000..7eed19a694c3 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts > @@ -0,0 +1,267 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> > + > +#include "qcs8300.dtsi" > +/ { > + model = "Qualcomm Technologies, Inc. QCS8300 Ride"; > + compatible = "qcom,qcs8300-ride", "qcom,qcs8300"; > + chassis-type = "embedded"; > + > + aliases { > + serial0 = &uart7; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + clocks { > + xo_board_clk: xo-board-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <38400000>; > + }; > + > + sleep_clk: sleep-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32000>; > + }; Move both clocks to the qcs8300.dtsi. If you wish, you can keep frequencies in the board DT file. > + }; > +}; > + > +&apps_rsc { > + regulators-0 { > + compatible = "qcom,pmm8654au-rpmh-regulators"; > + qcom,pmic-id = "a"; > + > + vreg_s4a: smps4 { > + regulator-name = "vreg_s4a"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_s9a: smps9 { > + regulator-name = "vreg_s9a"; > + regulator-min-microvolt = <1352000>; > + regulator-max-microvolt = <1352000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3a: ldo3 { > + regulator-name = "vreg_l3a"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4a: ldo4 { > + regulator-name = "vreg_l4a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l5a: ldo5 { > + regulator-name = "vreg_l5a"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6a: ldo6 { > + regulator-name = "vreg_l6a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7a: ldo7 { > + regulator-name = "vreg_l7a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8a: ldo8 { > + regulator-name = "vreg_l8a"; > + regulator-min-microvolt = <2504000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9a: ldo9 { > + regulator-name = "vreg_l9a"; > + regulator-min-microvolt = <2970000>; > + regulator-max-microvolt = <3072000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + > + regulators-1 { > + compatible = "qcom,pmm8654au-rpmh-regulators"; > + qcom,pmic-id = "c"; > + > + vreg_s5c: smps5 { > + regulator-name = "vreg_s5c"; > + regulator-min-microvolt = <1104000>; > + regulator-max-microvolt = <1104000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l1c: ldo1 { > + regulator-name = "vreg_l1c"; > + regulator-min-microvolt = <300000>; > + regulator-max-microvolt = <500000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2c: ldo2 { > + regulator-name = "vreg_l2c"; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <904000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4c: ldo4 { > + regulator-name = "vreg_l4c"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6c: ldo6 { > + regulator-name = "vreg_l6c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7c: ldo7 { > + regulator-name = "vreg_l7c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8c: ldo8 { > + regulator-name = "vreg_l8c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9c: ldo9 { > + regulator-name = "vreg_l9c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > +}; > + > +&gcc { > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&sleep_clk>, > + <0>, > + <0>, > + <0>, > + <0>, > + <0>, > + <0>, > + <0>, > + <0>; Move this to the qcs8300.dtsi (and rpmhcc too). > +}; > + > +&qupv3_id_0 { > + status = "okay"; > +}; > + > +&remoteproc_adsp { > + firmware-name = "qcom/qcs8300/adsp.mbn"; > + status = "okay"; > +}; > + > +&remoteproc_cdsp { > + firmware-name = "qcom/qcs8300/cdsp0.mbn"; > + status = "okay"; > +}; > + > +&remoteproc_gpdsp { > + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; > + status = "okay"; > +}; > + > +&rpmhcc { > + clocks = <&xo_board_clk>; > + clock-names = "xo"; qcs8300.dtsi > +}; > + > +&uart7 { > + status = "okay"; > +}; > + > +&ufs_mem_hc { > + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; > + vcc-supply = <&vreg_l8a>; > + vcc-max-microamp = <1100000>; > + vccq-supply = <&vreg_l4c>; > + vccq-max-microamp = <1200000>; > + status = "okay"; > +}; > + > +&ufs_mem_phy { > + vdda-phy-supply = <&vreg_l4a>; > + vdda-pll-supply = <&vreg_l5a>; > + status = "okay"; > +}; > > -- > 2.25.1 >
On Thu, Nov 28, 2024 at 04:44:46PM +0800, Jingyi Wang wrote: > Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs, > UFS and booting to shell with uart console. > > Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu > (added ufs, adsp and gpdsp nodes). > > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 2 +- > arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 267 ++++++++++++++++++++++++++++++ > 2 files changed, 268 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 9bb8b191aeb5..d9545743606a 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb It would be good to add a comment to the commit message about why you are removing qcs8550-aim300-aiot.dtb from the Makefile. Andrew
On 28/11/2024 17:49, Andrew Lunn wrote: > On Thu, Nov 28, 2024 at 04:44:46PM +0800, Jingyi Wang wrote: >> Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs, >> UFS and booting to shell with uart console. >> >> Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu >> (added ufs, adsp and gpdsp nodes). >> >> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> >> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 2 +- >> arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 267 ++++++++++++++++++++++++++++++ >> 2 files changed, 268 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index 9bb8b191aeb5..d9545743606a 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb >> -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb >> +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > It would be good to add a comment to the commit message about why you > are removing qcs8550-aim300-aiot.dtb from the Makefile. Especially that it was not in v2 (which I reviewed) and nothing in the changelog explains this removal. Best regards, Krzysztof
On 11/29/2024 1:40 AM, Krzysztof Kozlowski wrote: > On 28/11/2024 17:49, Andrew Lunn wrote: >> On Thu, Nov 28, 2024 at 04:44:46PM +0800, Jingyi Wang wrote: >>> Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs, >>> UFS and booting to shell with uart console. >>> >>> Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu >>> (added ufs, adsp and gpdsp nodes). >>> >>> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> >>> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/Makefile | 2 +- >>> arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 267 ++++++++++++++++++++++++++++++ >>> 2 files changed, 268 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >>> index 9bb8b191aeb5..d9545743606a 100644 >>> --- a/arch/arm64/boot/dts/qcom/Makefile >>> +++ b/arch/arm64/boot/dts/qcom/Makefile >>> @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb >>> -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb >>> +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb >> >> It would be good to add a comment to the commit message about why you >> are removing qcs8550-aim300-aiot.dtb from the Makefile. > > Especially that it was not in v2 (which I reviewed) and nothing in the > changelog explains this removal. > sorry it was a typo, will fix that > Best regards, > Krzysztof
On 11/29/2024 12:49 AM, Andrew Lunn wrote: > On Thu, Nov 28, 2024 at 04:44:46PM +0800, Jingyi Wang wrote: >> Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs, >> UFS and booting to shell with uart console. >> >> Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu >> (added ufs, adsp and gpdsp nodes). >> >> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> >> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 2 +- >> arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 267 ++++++++++++++++++++++++++++++ >> 2 files changed, 268 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index 9bb8b191aeb5..d9545743606a 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb >> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb >> -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb >> +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > It would be good to add a comment to the commit message about why you > are removing qcs8550-aim300-aiot.dtb from the Makefile. > > Andrew sorry it was a typo, will fix that Thanks, Jingyi
On 11/28/2024 9:29 PM, Dmitry Baryshkov wrote: >> +#include "qcs8300.dtsi" >> +/ { >> + model = "Qualcomm Technologies, Inc. QCS8300 Ride"; >> + compatible = "qcom,qcs8300-ride", "qcom,qcs8300"; >> + chassis-type = "embedded"; >> + >> + aliases { >> + serial0 = &uart7; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + clocks { >> + xo_board_clk: xo-board-clk { >> + compatible = "fixed-clock"; >> + #clock-cells = <0>; >> + clock-frequency = <38400000>; >> + }; >> + >> + sleep_clk: sleep-clk { >> + compatible = "fixed-clock"; >> + #clock-cells = <0>; >> + clock-frequency = <32000>; >> + }; > Move both clocks to the qcs8300.dtsi. If you wish, you can keep > frequencies in the board DT file. > Dmirty, Move xo clock and sleep clock to board DT from SoC DT are due to review comments in [1] and [2]. As you and Krzysztof discussed in [3], there're pros and cons for different solutions. There are three possible ways. Put these two clocks in board DT is aligned with hardware. These two clocks are provided by PMIC instead of SoC. Put these two clocks in SoC DT can reduce duplication since they are not supposed to be changed on different board. Put these two clocks in SoC DT and set frequency in board DT. We need a unify way to deal with this kind of nodes and keep it consistent across Qualcomm SoC. Who shall make this decision? [1]https://lore.kernel.org/all/10914199-1e86-4a2e-aec8-2a48cc49ef14@kernel.org/ [2]https://lore.kernel.org/all/be8b573c-db4e-4eec-a9a6-3cd83d04156d@kernel.org/ [3]https://lore.kernel.org/all/4kopdkvbkrpcpzwteezm427ml5putqvzsnfkpmg76spsple7l5@mg7v3ihwxnit/ >> + }; >> +}; >> +
On Fri, Nov 29, 2024 at 11:13:28AM +0800, Tingwei Zhang wrote: > On 11/28/2024 9:29 PM, Dmitry Baryshkov wrote: > > > +#include "qcs8300.dtsi" > > > +/ { > > > + model = "Qualcomm Technologies, Inc. QCS8300 Ride"; > > > + compatible = "qcom,qcs8300-ride", "qcom,qcs8300"; > > > + chassis-type = "embedded"; > > > + > > > + aliases { > > > + serial0 = &uart7; > > > + }; > > > + > > > + chosen { > > > + stdout-path = "serial0:115200n8"; > > > + }; > > > + > > > + clocks { > > > + xo_board_clk: xo-board-clk { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <38400000>; > > > + }; > > > + > > > + sleep_clk: sleep-clk { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <32000>; > > > + }; > > Move both clocks to the qcs8300.dtsi. If you wish, you can keep > > frequencies in the board DT file. > > > Dmirty, > > Move xo clock and sleep clock to board DT from SoC DT are due to review > comments in [1] and [2]. > > As you and Krzysztof discussed in [3], there're pros and cons for different > solutions. There are three possible ways. > > Put these two clocks in board DT is aligned with hardware. These two clocks > are provided by PMIC instead of SoC. > > Put these two clocks in SoC DT can reduce duplication since they are not > supposed to be changed on different board. > > Put these two clocks in SoC DT and set frequency in board DT. > > We need a unify way to deal with this kind of nodes and keep it consistent > across Qualcomm SoC. > > Who shall make this decision? After an offline discussion I've send [4]. [4] https://lore.kernel.org/linux-arm-msm/20241130-fix-board-clocks-v2-0-b9a35858657e@linaro.org/ > > [1]https://lore.kernel.org/all/10914199-1e86-4a2e-aec8-2a48cc49ef14@kernel.org/ > [2]https://lore.kernel.org/all/be8b573c-db4e-4eec-a9a6-3cd83d04156d@kernel.org/ > [3]https://lore.kernel.org/all/4kopdkvbkrpcpzwteezm427ml5putqvzsnfkpmg76spsple7l5@mg7v3ihwxnit/ > > > > + }; > > > +}; > > > + > > > -- > Thanks, > Tingwei
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 9bb8b191aeb5..d9545743606a 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -114,7 +114,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb -dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts new file mode 100644 index 000000000000..7eed19a694c3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> + +#include "qcs8300.dtsi" +/ { + model = "Qualcomm Technologies, Inc. QCS8300 Ride"; + compatible = "qcom,qcs8300-ride", "qcom,qcs8300"; + chassis-type = "embedded"; + + aliases { + serial0 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + clocks { + xo_board_clk: xo-board-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s4a: smps4 { + regulator-name = "vreg_s4a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_s9a: smps9 { + regulator-name = "vreg_s9a"; + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3a: ldo3 { + regulator-name = "vreg_l3a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s5c: smps5 { + regulator-name = "vreg_s5c"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <500000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + }; +}; + +&gcc { + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&remoteproc_adsp { + firmware-name = "qcom/qcs8300/adsp.mbn"; + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/qcs8300/cdsp0.mbn"; + status = "okay"; +}; + +&remoteproc_gpdsp { + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; + status = "okay"; +}; + +&rpmhcc { + clocks = <&xo_board_clk>; + clock-names = "xo"; +}; + +&uart7 { + status = "okay"; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l8a>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l4c>; + vccq-max-microamp = <1200000>; + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l5a>; + status = "okay"; +};