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a=openpgp-sha256; l=912; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=pg+0ixud7QxxrDakgimvHJR2/Qzsae3oMGYCum0sTmc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnSm30pgr9Naoq+3Qet72FV6DwivG+cEdaNoCl8 Co+czkbIsyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ0pt9AAKCRCLPIo+Aiko 1Xg1B/92NJCJdlLS/k0Z3h+rzI/LkaRkV9Jl8wywC9w93L/MjLmdjFWCIUkp9sXn4GmRhwXVeAr MUu9whrSnpmxNRWjpyIQ+MFNLjUKRy0yQmA1JeT3u/gudy7hqUoglQA4ejPTTDZOzbuh2chys0D jFGa9k72G7oqDrieYKHc9rONxkKFoj/jbUqXC62Ov95V9wMOqGNF8LZBAR7wTEy96dBRcmRgY98 IZzUPXSN+phglaoYbCasSiOxN8kwqsgFMRobRniIbUfb2bCmYnkrKpSqpjGa7EXyCNFgdqsyC9Y IknUev7fIFeNcYRAJy7FgqnXyW1H6oXo/PYxAqv4qbfLtllA X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SM6375 platform uses PM6125 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 59d34ca97f91 ("arm64: dts: qcom: Add initial device tree for SM6375") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index e0b1c54e98c0e8d244b5f658eaee2af5001c3855..7c929168ed0805e832b818516083d48968d3bbce 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -29,7 +29,7 @@ xo_board_clk: xo-board-clk { sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; };