@@ -1187,7 +1187,7 @@ &usb_1_ss0_hsphy {
};
&usb_1_ss0_qmpphy {
- vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-phy-supply = <&vreg_l2j_1p2>;
vdda-pll-supply = <&vreg_l1j_0p8>;
status = "okay";
@@ -1215,7 +1215,7 @@ &usb_1_ss1_hsphy {
};
&usb_1_ss1_qmpphy {
- vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-phy-supply = <&vreg_l2j_1p2>;
vdda-pll-supply = <&vreg_l2d_0p9>;
status = "okay";
@@ -1243,7 +1243,7 @@ &usb_1_ss2_hsphy {
};
&usb_1_ss2_qmpphy {
- vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-phy-supply = <&vreg_l2j_1p2>;
vdda-pll-supply = <&vreg_l2d_0p9>;
status = "okay";
On the X1E80100 CRD, &vreg_l3e_1p2 only powers &usb_mp_qmpphy0/1 (i.e. USBSS_3 and USBSS_4). The QMP PHYs for USB_0, USB_1 and USB_2 are actually powered by &vreg_l2j_1p2. Cc: stable@vger.kernel.org Fixes: ae5cee8e7349 ("arm64: dts: qcom: x1e80100-crd: Fix USB PHYs regulators") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)