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Tue, 17 Dec 2024 06:49:00 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 43h33kx8y1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Dec 2024 06:49:00 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4BH6n0W6014874; Tue, 17 Dec 2024 06:49:00 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 4BH6mx4F014868 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Dec 2024 06:49:00 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id 022885AC; Tue, 17 Dec 2024 12:18:59 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v4 3/7] dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075 Date: Tue, 17 Dec 2024 12:18:52 +0530 Message-ID: <20241217064856.2772305-4-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241217064856.2772305-1-quic_wasimn@quicinc.com> References: <20241217064856.2772305-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: fbSOpYA5qwIx-RmqLrpS9Olq0FkjauyT X-Proofpoint-GUID: fbSOpYA5qwIx-RmqLrpS9Olq0FkjauyT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 adultscore=0 suspectscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412170054 qcs9075 rb8, ride & ride-r3 boards are based on QCS9075 SoC. QCS9075 is compatible IoT-industrial grade variant of SA8775p SoC. Unlike QCS9100, it doesn't have safety monitoring feature of Safety-Island(SAIL) subsystem, which affects thermal management. Acked-by: Rob Herring (Arm) Signed-off-by: Wasim Nazir --- Documentation/devicetree/bindings/arm/qcom.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.47.0 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index d394dffe3fba..8cee92a804c4 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -57,6 +57,7 @@ description: | qcs8550 qcm2290 qcm6490 + qcs9075 qcs9100 qdu1000 qrb2210 @@ -950,6 +951,14 @@ properties: - qcom,sa8775p-ride-r3 - const: qcom,sa8775p + - items: + - enum: + - qcom,qcs9075-rb8 + - qcom,qcs9075-ride + - qcom,qcs9075-ride-r3 + - const: qcom,qcs9075 + - const: qcom,sa8775p + - items: - enum: - qcom,qcs9100-ride