From patchwork Thu Dec 26 10:24:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 13921221 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7D3614C59B; Thu, 26 Dec 2024 10:25:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735208719; cv=none; b=DnLXRmLkbZ3IJ0TOcJaKPbi7S1IxqwF0+TO7E69/A64DxGhLFEIW+aKr2VvhNyz/zKOW59jFu515nkWkPUvImdvQnyBTruEY/8HgKRmUxAH3+ylWyxEJpXZHiqpmVepSqAGP2z5YorAa1fJqlnoqSJB/Yvih4H3XBeRm4d3Rh9A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735208719; c=relaxed/simple; bh=nSIx8RBTiODPfUfabQPnUu0E3on6iW2OJdomZ5MSg2o=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GdIbJuugM7D7/SG4eCJh5XH1iLwH+7mKiEl/k/lgmE0l+I1IO+r9bBYEWQ8ZHtiW7++Aild8ldtgbwe8V5uS0BOG1dbR3WVoksiWayebePx5wa3gtoUs2g2sKKKlxy9uJuVL+pqwIcJTnKKU6n1WUeR67+/qhh/4pINLYwcX8uQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=of5IrE/+; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="of5IrE/+" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4BQ6uFwA005318; Thu, 26 Dec 2024 10:24:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= vG/xGFWLJs/sDNYCDJ+UgTVfpFPnRAO1Xwp3Z1u9Od0=; b=of5IrE/+voHD6uLR ctWACzfGQVWWBMNNkjE6NxLiIZRF/uQWFgJvPZr1qV45UhfctaN/rVtlOTvO2HpK r9PLyhYnML0y3LTClOV4ukLL7iPTcT2HVSp0V5w6pbSxJnGwlnqZboDRvzf3GBQZ O6j+rtCqMEU595KePiPzeiuef3komJaGouBbRynfYOj3PisjYLZ98x1hBX0eJTQG Zn1GpGzDsrx1z0CW8SETBttX8UxnkOqxyGWSUKP3oNwsE2ravs7zMAwN4tJHQOd1 broOCPs74AJBcZd2oOANONS+SOlibIHBXtFv+ws44gFPkZShk/f02aDXWV2pxAHK mKZEBA== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43s2a8sgxr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 26 Dec 2024 10:24:58 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BQAOuwE029750 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 26 Dec 2024 10:24:56 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 26 Dec 2024 02:24:51 -0800 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 1/5] dt-bindings: phy: qcom,uniphy-pcie: Document PCIe uniphy Date: Thu, 26 Dec 2024 15:54:28 +0530 Message-ID: <20241226102432.3193366-2-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241226102432.3193366-1-quic_varada@quicinc.com> References: <20241226102432.3193366-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: yWNRHm6DZKQVeHV6F2Z6yGboHkdeeudv X-Proofpoint-ORIG-GUID: yWNRHm6DZKQVeHV6F2Z6yGboHkdeeudv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 priorityscore=1501 malwarescore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 spamscore=0 impostorscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412260091 From: Nitheesh Sekar Document the Qualcomm UNIPHY PCIe 28LP present in IPQ5332. Signed-off-by: Nitheesh Sekar Signed-off-by: Varadarajan Narayanan --- v4: Remove reset-names as the resets are not used individually Remove clock-output-names as its usage is removed from driver Fix order in the 'required' section v3: Fix compatible string to be similar to other phys and rename file accordingly Fix clocks minItems -> maxItems Change one of the maintainer from Sricharan to Varadarajan v2: Rename the file to match the compatible Drop 'driver' from title Dropped 'clock-names' Fixed 'reset-names' --- .../phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml new file mode 100644 index 000000000000..b6b3610ad436 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm UNIPHY PCIe 28LP PHY + +maintainers: + - Nitheesh Sekar + - Varadarajan Narayanan + +description: + PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC + +properties: + compatible: + enum: + - qcom,ipq5332-uniphy-gen3x1-pcie-phy + - qcom,ipq5332-uniphy-gen3x2-pcie-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 2 + + resets: + maxItems: 3 + + "#phy-cells": + const: 0 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - resets + - "#phy-cells" + - "#clock-cells" + +additionalProperties: false + +examples: + - | + #include + + pcie0_phy: phy@4b0000 { + compatible = "qcom,ipq5332-uniphy-gen3x1-pcie-phy"; + reg = <0x004b0000 0x800>; + + clocks = <&gcc GCC_PCIE3X1_0_PIPE_CLK>, + <&gcc GCC_PCIE3X1_PHY_AHB_CLK>; + + resets = <&gcc GCC_PCIE3X1_0_PHY_BCR>, + <&gcc GCC_PCIE3X1_PHY_AHB_CLK_ARES>, + <&gcc GCC_PCIE3X1_0_PHY_PHY_BCR>; + + #clock-cells = <0>; + + #phy-cells = <0>; + };