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Tue, 7 Jan 2025 08:48:57 GMT Received: from yuanfang4-gv.ap.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 7 Jan 2025 00:48:50 -0800 From: Yuanfang Zhang Date: Tue, 7 Jan 2025 16:48:26 +0800 Subject: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250107-sm8650-cs-dt-v4-1-2113b18754ea@quicinc.com> X-B4-Tracking: v=1; b=H4sIAFnqfGcC/33MvQ7CIBiF4VtpmMXwb3HyPowDfoBlaKtQiabpv UsbHaqJ4znJ844ouRhcQvtqRNHlkELflSE2FYLGdBeHgy0bMcIEZUTj1NZKEgwJ2wEbq4S24I1 0NSrkGp0PjyV3PJXdhDT08bnUM53fd4iSdShTTDFTWmkuJJW1ONzuAUIHW+hbNKcy+8dZ4eCZA AX6bC38cv7hklDCvzgvfCe14V4ZDlCv+TRNLyDCVMkoAQAA X-Change-ID: 20241209-sm8650-cs-dt-ad649dcfa5e8 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Yuanfang Zhang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Signed-off-by: Yuanfang Zhang --- Changes in v4: - Re-sort these nodes by address. - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com Changes in v3: - Move ete0 and funnel-ete to /. - Update coding style. - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com Changes in v2: - Update compatible for funnel and etf. - remove unnecessary property: reg-names and arm,primecell-periphid. - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++ 1 file changed, 166 insertions(+) --- base-commit: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4 change-id: 20241209-sm8650-cs-dt-ad649dcfa5e8 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 { }; }; + ete0 { + compatible = "arm,embedded-trace-extension"; + + cpu = <&cpu0>; + + out-ports { + port { + ete0_out_funnel_ete: endpoint { + remote-endpoint = <&funnel_ete_in_ete0>; + }; + }; + }; + }; + + funnel-ete { + compatible = "arm,coresight-static-funnel"; + + in-ports { + port { + funnel_ete_in_ete0: endpoint { + remote-endpoint = <&ete0_out_funnel_ete>; + }; + }; + }; + + out-ports { + port { + funnel_ete_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_funnel_ete>; + }; + }; + }; + }; + firmware { scm: scm { compatible = "qcom,scm-sm8650", "qcom,scm"; @@ -4854,6 +4888,138 @@ data-pins { }; }; + funnel@10042000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0x0 0x10042000 0x0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@4 { + reg = <4>; + + funnel_in1_in_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_out_funnel_in1>; + }; + }; + }; + + out-ports { + port { + funnel_in1_out_funnel_qdss: endpoint { + remote-endpoint = <&funnel_qdss_in_funnel_in1>; + }; + }; + }; + }; + + funnel@10045000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0x0 0x10045000 0x0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + funnel_qdss_in_funnel_in1: endpoint { + remote-endpoint = <&funnel_in1_out_funnel_qdss>; + }; + }; + }; + + out-ports { + port { + funnel_qdss_out_funnel_aoss: endpoint { + remote-endpoint = <&funnel_aoss_in_funnel_qdss>; + }; + }; + }; + }; + + funnel@10b04000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0x0 0x10b04000 0x0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + + funnel_aoss_in_funnel_qdss: endpoint { + remote-endpoint = <&funnel_qdss_out_funnel_aoss>; + }; + }; + }; + + out-ports { + port { + funnel_aoss_out_tmc_etf: endpoint { + remote-endpoint = <&tmc_etf_in_funnel_aoss>; + }; + }; + }; + }; + + tmc@10b05000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + + reg = <0x0 0x10b05000 0x0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + port { + tmc_etf_in_funnel_aoss: endpoint { + remote-endpoint = <&funnel_aoss_out_tmc_etf>; + }; + }; + }; + }; + + funnel@13810000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0x0 0x13810000 0x0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + port { + funnel_apss_in_funnel_ete: endpoint { + remote-endpoint = <&funnel_ete_out_funnel_apss>; + }; + }; + }; + + out-ports { + port { + funnel_apss_out_funnel_in1: endpoint { + remote-endpoint = <&funnel_in1_in_funnel_apss>; + }; + }; + }; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500"; reg = <0 0x15000000 0 0x100000>;