| Message ID | 20250107101647.2087358-3-quic_gokulsri@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add new driver for WCSS secure PIL loading | expand |
On Tue, Jan 07, 2025 at 03:46:41PM +0530, Gokul Sriram Palanisamy wrote: > From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > > Add new binding document for hexagon based WCSS secure PIL remoteproc. > IPQ5332, IPQ5424 and IPQ9574 follows secure PIL remoteproc. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../remoteproc/qcom,wcss-sec-pil.yaml | 131 ++++++++++++++++++ > 1 file changed, 131 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> > + remoteproc@d100000 { > + compatible = "qcom,ipq5332-wcss-sec-pil"; > + reg = <0xd100000 0x4040>; > + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; Nit: .mbn
On 07/01/2025 13:56, Gokul Sriram P wrote: >>> +examples: >>> + - | >>> + #include <dt-bindings/interrupt-controller/arm-gic.h> >>> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> >>> + remoteproc@d100000 { >>> + compatible = "qcom,ipq5332-wcss-sec-pil"; >>> + reg = <0xd100000 0x4040>; >>> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; >> Nit: .mbn >> > > Hi Dmitry, > > Its .mdt format only in our case. > Then probably you need to fix your format. Best regards, Krzysztof
On Tue, 7 Jan 2025 at 14:52, Gokul Sriram P <quic_gokulsri@quicinc.com> wrote: > > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> > + remoteproc@d100000 { > + compatible = "qcom,ipq5332-wcss-sec-pil"; > + reg = <0xd100000 0x4040>; > + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; > > Nit: .mbn > > Hi Dmitry, Please fix your email client to never ever send HTML emails if you are participating in discussions on the public mailing lists. For example, quotation level is incorrect. > Its .mdt format only in our case. NAK, please work with Kalle to pil-squash the remoteproc firmware.
On 07/01/2025 13:56, Gokul Sriram P wrote: >>>> +examples: >>>> + - | >>>> + #include <dt-bindings/interrupt-controller/arm-gic.h> >>>> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> >>>> + remoteproc@d100000 { >>>> + compatible = "qcom,ipq5332-wcss-sec-pil"; >>>> + reg = <0xd100000 0x4040>; >>>> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; >>> Nit: .mbn >>> >> >> Hi Dmitry, >> >> Its .mdt format only in our case. >> > Then probably you need to fix your format. Hi Dmitry/ Krzysztof, We use split firmware image where .mbn image is split into x segments with .b00 to .bxx extension. The mbn header along with signing metadata will be part of the .mdt. The secure authenticatior (TrustZone) will expect metadata as part of .mdt and will authenticate the .bxx segments. Certain msm platforms already support .mdt format as in https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml?h=v6.13-rc6. Regards, Gokul
On 08/01/2025 12:19, Gokul Sriram P (QUIC) wrote: > On 07/01/2025 13:56, Gokul Sriram P wrote: >>>>> +examples: >>>>> + - | >>>>> + #include <dt-bindings/interrupt-controller/arm-gic.h> >>>>> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> >>>>> + remoteproc@d100000 { >>>>> + compatible = "qcom,ipq5332-wcss-sec-pil"; >>>>> + reg = <0xd100000 0x4040>; >>>>> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; >>>> Nit: .mbn >>>> >>> >>> Hi Dmitry, >>> >>> Its .mdt format only in our case. >>> >> Then probably you need to fix your format. > > Hi Dmitry/ Krzysztof, > We use split firmware image where .mbn image is split into x segments with .b00 to .bxx extension. The mbn header along with signing metadata will be part of the .mdt. The secure authenticatior (TrustZone) will expect metadata as part of .mdt and will authenticate the .bxx segments. NAK, you got feedback which you refuse to implement. > > Certain msm platforms already support .mdt format as in https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml?h=v6.13-rc6. That's an overlook, not support. Don't use arguments "someone sneaked it, so I can as well". Best regards, Krzysztof
>> >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> >> + remoteproc@d100000 { >> + compatible = "qcom,ipq5332-wcss-sec-pil"; >> + reg = <0xd100000 0x4040>; >> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; >> >> Nit: .mbn >> >> Hi Dmitry, > > Please fix your email client to never ever send HTML emails if you are participating in discussions on the public mailing lists. For example, quotation level is incorrect. > >> Its .mdt format only in our case. > > NAK, please work with Kalle to pil-squash the remoteproc firmware. Sure Dmitry. Will check and address. Regards, Gokul
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml new file mode 100644 index 000000000000..1db36d36e5e5 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,wcss-sec-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCSS Secure Peripheral Image Loader + +maintainers: + - Manikanta Mylavarapu <quic_mmanikan@quicinc.com> + +description: + Wireless Connectivity Subsystem (WCSS) Secure Peripheral Image Loader loads + firmware and power up QDSP6 remoteproc on the Qualcomm IPQ series SoC. + +properties: + compatible: + enum: + - qcom,ipq5332-wcss-sec-pil + - qcom,ipq5424-wcss-sec-pil + - qcom,ipq9574-wcss-sec-pil + + reg: + maxItems: 1 + + firmware-name: + maxItems: 1 + description: Firmware name for the Hexagon core + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: sleep clock + + clock-names: + items: + - const: sleep + + mboxes: + maxItems: 1 + description: A phandle for the TMECom mailbox driver + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the remote processor + items: + - description: Stop Q6 + - description: Shutdown Q6 + + qcom,smem-state-names: + description: + Names of the states used by the AP to signal the remote processor + items: + - const: stop + - const: shutdown + + memory-region: + items: + - description: Q6 reserved region + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the Modem. + unevaluatedProperties: false + +required: + - compatible + - reg + - firmware-name + - interrupts + - interrupt-names + - qcom,smem-states + - qcom,smem-state-names + - memory-region + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> + remoteproc@d100000 { + compatible = "qcom,ipq5332-wcss-sec-pil"; + reg = <0xd100000 0x4040>; + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; + interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 3 IRQ_TYPE_NONE>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&gcc GCC_IM_SLEEP_CLK>; + clock-names = "sleep"; + + mboxes = <&tmel_qmp 0>; + qcom,smem-states = <&wcss_smp2p_out 1>, + <&wcss_smp2p_out 0>; + qcom,smem-state-names = "stop", + "shutdown"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>; + label = "rtr"; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + }; + };