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[34.125.135.129]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2f54a287254sm196478a91.20.2025.01.07.17.28.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jan 2025 17:28:51 -0800 (PST) From: Stephen Boyd To: Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, Dmitry Baryshkov , Krzysztof Kozlowski , Rob Herring , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Conor Dooley , Saravana Kannan , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Krzysztof Kozlowski Subject: [RFC PATCH 2/6] dt-bindings: bus: Add qcom,soc-sc7180 SoC Date: Tue, 7 Jan 2025 17:28:39 -0800 Message-ID: <20250108012846.3275443-3-swboyd@chromium.org> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog In-Reply-To: <20250108012846.3275443-1-swboyd@chromium.org> References: <20250108012846.3275443-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document the Qualcomm SC7180 System on a Chip (SoC). This SoC is made up of multiple devices that have their own bindings, therefore this binding is for a "bus" that is the SoC node. TODO: Document all child nodes. This is woefully incomplete but at least shows what is involved with describing an SoC node in dt schema. Cc: Rob Herring Cc: Krzysztof Kozlowski Cc: Conor Dooley Cc: Cc: Bjorn Andersson Cc: Konrad Dybcio Cc: Signed-off-by: Stephen Boyd --- .../bindings/bus/qcom,soc-sc7180.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/qcom,soc-sc7180.yaml diff --git a/Documentation/devicetree/bindings/bus/qcom,soc-sc7180.yaml b/Documentation/devicetree/bindings/bus/qcom,soc-sc7180.yaml new file mode 100644 index 000000000000..56f8b75ecdab --- /dev/null +++ b/Documentation/devicetree/bindings/bus/qcom,soc-sc7180.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/qcom,soc-sc7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7180 SoC + +maintainers: + - Bjorn Andersson + - Konrad Dybcio + +description: + Qualcomm's SC7180 System on a Chip (SoC). + +properties: + compatible: + items: + - const: qcom,soc-sc7180 + - const: simple-bus + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + clock-controller@100000: + $ref: /schemas/clock/qcom,gcc-sc7180.yaml# + + watchdog@17c10000: + $ref: /schemas/watchdog/qcom-wdt.yaml# + +required: + - compatible + - '#address-cells' + - '#size-cells' + - clock-controller@100000 + - watchdog@17c10000 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "qcom,soc-sc7180", "simple-bus"; + + // TODO: Is it possible to ignore the details? + clock-controller@100000 { + compatible = "qcom,gcc-sc7180"; + reg = <0 0x00100000 0 0x1f0000>; + clocks = <&rpmhcc_RPMH_CXO_CLK>, + <&rpmhcc_RPMH_CXO_CLK_A>, + <&sleep_clk>; + clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + power-domains = <&rpmhpd_SC7180_CX>; + }; + + watchdog@17c10000 { + compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt"; + reg = <0 0x17c10000 0 0x1000>; + clocks = <&sleep_clk>; + interrupts = ; + }; + }; + +...