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Thu, 09 Jan 2025 07:24:03 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Jan 2025 16:24:02 +0100 Subject: [PATCH] arm64: dts: qcom: add missing cache node for cpu1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250109-topic-sm8650-cpu1-missing-cache-v1-1-0e85148a48a8@linaro.org> X-B4-Tracking: v=1; b=H4sIABHqf2cC/x3NQQqDMBBA0avIrB1ILAmJVyku4jjqLIwh05aCe PeGLt/m/wuUq7DC2F1Q+SMqZ26wfQe0p7wxytIMgxmcsSbi6yxCqEfwziCVt8VDVCVvSIl2xuC 8n2NI8/qI0Cql8irf/+E53fcPGUHsTHEAAAA= X-Change-ID: 20250109-topic-sm8650-cpu1-missing-cache-8566b98abf39 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1094; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=rhTBVIa6Z2yjlqW0cljU/JWm9DLEsWHp+KGdZgAU/Iw=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnf+oSrcPDIRK1hF1BUciaar+IosNZC0Lj1fnR+eEl 3fPNmECJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ3/qEgAKCRB33NvayMhJ0Tn8D/ 96ve/r9OqqEhVrRjeI88rIpbHU+cBANM+igyA0+9rlqOHWh7Bo9Mf+kTsZ3dQj0y84Xu4ov3yyJXK/ xWwI9tUNzzw7r+p2MrixSWNf49lU9ncnWmlkZ/bKwrBsKCb3ClFF0P0K3GBI/rZqhKWFOOjtZPgTr9 NrmvKiOiNjY+v22/YvFUXfIiuSoiDAnIZGZZcH/kzOZcqg9LZ3hchiBTy6Za9QQyZ3N37MInTtv2Q+ 9kudKzSXRkXiH8YkQOXMZwnpFSWkWlzIhdqgqezTTKuwjJ9PQusW931jB38ofvku3VmbzBq8O2iCv6 yXJKpW1xwZFQ8p0bbDXSYYf2elMD9gNrSqAwPTx/gcE+p9QdTEj0Kay8udYJNzHkduqA6zq8+6xgCA KN3sYFj+iHoIQhUmJeGltY6yjurERhq3jBtEW0anikGDWLggUwkPkoC2FEuGMLHgQLukFrVDmucXm6 wn3ZtbJ3YerWn9Vys4yzw+G0zhlqdczHMGfSZKv7ciRVpDiZyJN0gX28SiNTT8qps6UNwDLvTjFO4Y EU2y5jH7lXlrHgh/f+Yrvfq++rF+1/9LTa2mdukGE9pK0u4djhP97RV7CiHk5ldOFHVTrNMeAosU2e s46CdPt6ZPRK0i+urkDVF4nSqAgCK/ynax5rJ1lv9rD4Bd4OcIeUVxZUyyew== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the missing l2-cache node for the cpu1 Fixes: 20eb2057b3e4 ("arm64: dts: qcom: sm8650: change labels to lower-case") Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi") Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) --- base-commit: 6ecd20965bdc21b265a0671ccf36d9ad8043f5ab change-id: 20250109-topic-sm8650-cpu1-missing-cache-8566b98abf39 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 86684cb9a9325618ddb74458621cf4bbdc1cc0d1..832f3a2c400e8348847bc24b27397e2a0dc08db8 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -119,6 +119,13 @@ cpu1: cpu@100 { qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; + + l2_100: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + next-level-cache = <&l3_0>; + }; }; cpu2: cpu@200 {