| Message ID | 20250125035920.2651972-3-quic_mmanikan@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add PCIe support for IPQ5424 | expand |
On Sat, Jan 25, 2025 at 09:29:18AM +0530, Manikanta Mylavarapu wrote: > Interconnect cells differ between the IPQ5332 and IPQ5424. > Therefore, update the interconnect cells according to the SoC. Why do they differ? Why they cannot be the same? > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- > .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > index 1230183fc0a9..fac7922d2473 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > @@ -35,8 +35,6 @@ properties: > - description: PCIE 2-lane PHY3 pipe clock source > > '#power-domain-cells': false > - '#interconnect-cells': > - const: 1 Properties are always defined top-level or in other schema. Best regards, Krzysztof
On 1/27/2025 12:57 PM, Krzysztof Kozlowski wrote: > On Sat, Jan 25, 2025 at 09:29:18AM +0530, Manikanta Mylavarapu wrote: >> Interconnect cells differ between the IPQ5332 and IPQ5424. >> Therefore, update the interconnect cells according to the SoC. > > Why do they differ? Why they cannot be the same? > Based on the comment received here [1], i updated interconnect cells to 2 to accommodate icc tags for IPQ5424. [1]: https://lore.kernel.org/linux-arm-msm/20250119124551.nl5272bz36ozvlqu@thinkpad/ I will update interconnect cells to 2 for IPQ5332 as well. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- >> .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> index 1230183fc0a9..fac7922d2473 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> @@ -35,8 +35,6 @@ properties: >> - description: PCIE 2-lane PHY3 pipe clock source >> >> '#power-domain-cells': false >> - '#interconnect-cells': >> - const: 1 > > Properties are always defined top-level or in other schema. I will define it in top-level and initialize with 2. Thanks & Regards, Manikanta.
On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote: > Interconnect cells differ between the IPQ5332 and IPQ5424. > Therefore, update the interconnect cells according to the SoC. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- > .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > index 1230183fc0a9..fac7922d2473 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > @@ -35,8 +35,6 @@ properties: > - description: PCIE 2-lane PHY3 pipe clock source > > '#power-domain-cells': false > - '#interconnect-cells': > - const: 1 > > required: > - compatible > @@ -54,6 +52,9 @@ allOf: > clocks: > maxItems: 5 > > + '#interconnect-cells': > + const: 1 > + > - if: > properties: > compatible: > @@ -65,6 +66,9 @@ allOf: > minItems: 7 > maxItems: 7 > > + '#interconnect-cells': > + const: 2 Please apply some criticism to the review comments you receive.. this only makes sense for platforms using icc-rpm or icc-rpmh. Since this driver registers an interconnect provider through icc_clk APIs, it explicitly uses a simple, onecell translation function to .get the nodes Please drop this patch Konrad
On 1/28/2025 4:56 PM, Konrad Dybcio wrote: > On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote: >> Interconnect cells differ between the IPQ5332 and IPQ5424. >> Therefore, update the interconnect cells according to the SoC. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- >> .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> index 1230183fc0a9..fac7922d2473 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> @@ -35,8 +35,6 @@ properties: >> - description: PCIE 2-lane PHY3 pipe clock source >> >> '#power-domain-cells': false >> - '#interconnect-cells': >> - const: 1 >> >> required: >> - compatible >> @@ -54,6 +52,9 @@ allOf: >> clocks: >> maxItems: 5 >> >> + '#interconnect-cells': >> + const: 1 >> + >> - if: >> properties: >> compatible: >> @@ -65,6 +66,9 @@ allOf: >> minItems: 7 >> maxItems: 7 >> >> + '#interconnect-cells': >> + const: 2 > > Please apply some criticism to the review comments you receive.. this only > makes sense for platforms using icc-rpm or icc-rpmh. > > Since this driver registers an interconnect provider through icc_clk APIs, > it explicitly uses a simple, onecell translation function to .get the nodes > > Please drop this patch Hi Konrad, Thank you for pointing this. I will drop the patch. Thanks & Regards, Manikanta.
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml index 1230183fc0a9..fac7922d2473 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml @@ -35,8 +35,6 @@ properties: - description: PCIE 2-lane PHY3 pipe clock source '#power-domain-cells': false - '#interconnect-cells': - const: 1 required: - compatible @@ -54,6 +52,9 @@ allOf: clocks: maxItems: 5 + '#interconnect-cells': + const: 1 + - if: properties: compatible: @@ -65,6 +66,9 @@ allOf: minItems: 7 maxItems: 7 + '#interconnect-cells': + const: 2 + unevaluatedProperties: false examples:
Interconnect cells differ between the IPQ5332 and IPQ5424. Therefore, update the interconnect cells according to the SoC. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)