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[v5,1/5] dt-bindings: nvmem: fixed-cell: increase bits start value to 31

Message ID 20250217-sar2130p-nvmem-v5-1-2f01049d1eea@linaro.org (mailing list archive)
State Not Applicable
Headers show
Series nvmem: qfprom: add Qualcomm SAR2130P support | expand

Commit Message

Dmitry Baryshkov Feb. 17, 2025, 4:33 p.m. UTC 
If NVMEM uses a data stride bigger than a byte, the starting bit of the
cell might be bigger than a byte (e.g. if the data comes in the second
byte of the 4-byte word). Allow the staring bit to be 8 or greater to
reflect such usecases.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
index 8b3826243dddfcf9c9bea531541c55d3fc04a3bf..38e3ad50ff4fb6200023f22b4c70c506349142df 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
@@ -27,7 +27,7 @@  properties:
     $ref: /schemas/types.yaml#/definitions/uint32-array
     items:
       - minimum: 0
-        maximum: 7
+        maximum: 31
         description:
           Offset in bit within the address range specified by reg.
       - minimum: 1