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Wed, 19 Feb 2025 19:49:58 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 19 Feb 2025 11:49:58 -0800 From: Jessica Zhang Date: Wed, 19 Feb 2025 11:49:21 -0800 Subject: [PATCH v3 5/5] drm/msm/dpu: rate limit snapshot capture for mmu faults Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250219-abhinavk-smmu-fault-handler-v3-5-aa3f0bf4434a@quicinc.com> References: <20250219-abhinavk-smmu-fault-handler-v3-0-aa3f0bf4434a@quicinc.com> In-Reply-To: <20250219-abhinavk-smmu-fault-handler-v3-0-aa3f0bf4434a@quicinc.com> To: Rob Clark , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" CC: Abhinav Kumar , , , , , "Jessica Zhang" X-Mailer: b4 0.15-dev-f0f05 X-Developer-Signature: v=1; a=ed25519-sha256; t=1739994597; l=2497; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=YPsv+J85E4gynCzjg0PYiO7irsKepAIrFxrCrUa1rpg=; b=ZKKbF2fG1ioYQ9g/42QWly7ev9sYIll9RRJScfkJcfdnhV3bTwvFbUXpvpSpkXWAcWWsYLiku zkU1+lapdpQD8YKAsl11lyhIh/wws0weMK9J9TZOG1qMwTK6mQyptfI X-Developer-Key: i=quic_jesszhan@quicinc.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SJvQ1ZOvKB2ZCzG_8Ws_akan444aioYt X-Proofpoint-GUID: SJvQ1ZOvKB2ZCzG_8Ws_akan444aioYt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-19_08,2025-02-19_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=921 spamscore=0 bulkscore=0 clxscore=1015 suspectscore=0 adultscore=0 malwarescore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502190153 From: Abhinav Kumar There is no recovery mechanism in place yet to recover from mmu faults for DPU. We can only prevent the faults by making sure there is no misconfiguration. Rate-limit the snapshot capture for mmu faults to once per msm_atomic_commit_tail() as that should be sufficient to capture the snapshot for debugging otherwise there will be a lot of DPU snapshots getting captured for the same fault which is redundant and also might affect capturing even one snapshot accurately. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang Reviewed-by: Dmitry Baryshkov --- Changes in v3: - Clear fault_snapshot_capture before calling prepare_commit() (Dmitry) - Make fault_snapshot_capture an atomic variable (Dmitry, Abhinav) --- drivers/gpu/drm/msm/msm_atomic.c | 2 ++ drivers/gpu/drm/msm/msm_kms.c | 5 ++++- drivers/gpu/drm/msm/msm_kms.h | 3 +++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index 9c45d641b521..44b402e70925 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -221,6 +221,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) kms->funcs->wait_flush(kms, crtc_mask); trace_msm_atomic_wait_flush_finish(crtc_mask); + atomic_set(&kms->fault_snapshot_capture, 0); + /* * Now that there is no in-progress flush, prepare the * current update: diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers/gpu/drm/msm/msm_kms.c index 1d3dae3d4c93..171462a8e08c 100644 --- a/drivers/gpu/drm/msm/msm_kms.c +++ b/drivers/gpu/drm/msm/msm_kms.c @@ -168,7 +168,10 @@ static int msm_kms_fault_handler(void *arg, unsigned long iova, int flags, void { struct msm_kms *kms = arg; - msm_disp_snapshot_state(kms->dev); + if (atomic_read(&kms->fault_snapshot_capture) == 0) { + msm_disp_snapshot_state(kms->dev); + atomic_inc(&kms->fault_snapshot_capture); + } return -ENOSYS; } diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index e60162744c66..3e28c4e012d2 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -128,6 +128,9 @@ struct msm_kms { int irq; bool irq_requested; + /* rate limit the snapshot capture to once per attach */ + atomic_t fault_snapshot_capture; + /* mapper-id used to request GEM buffer mapped for scanout: */ struct msm_gem_address_space *aspace;