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[v2,6/6] arm64: dts: qcom: x1e80100: enable rtc

Message ID 20250219134118.31017-7-johan+linaro@kernel.org (mailing list archive)
State New
Headers show
Series arm64: dts: qcom: x1e80100: enable rtc | expand

Commit Message

Johan Hovold Feb. 19, 2025, 1:41 p.m. UTC 
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.

On X1E based Windows on Arm machines the offset is stored in a Qualcomm
specific UEFI variable.

Unlike on previous platforms the alarm registers are also unaccessible
on X1E as they are owned by the ADSP.

Assume all X1E machines use similar firmware and enable the RTC in the
PMIC dtsi for now.

Based on a patch by Jonathan Marek. [1]

Link: https://lore.kernel.org/r/20241015004945.3676-4-jonathan@marek.ca # [1]
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Sebastian Reichel <sre@kernel.org> # Lenovo T14s Gen6
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
index d7a2a2b8fc6c..a59aa8e7642d 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
@@ -223,8 +223,7 @@  pmk8550_rtc: rtc@6100 {
 			reg = <0x6100>, <0x6200>;
 			reg-names = "rtc", "alarm";
 			interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
-			/* Not yet sure what blocks access */
-			status = "reserved";
+			qcom,no-alarm; /* alarm owned by ADSP */
 		};
 
 		pmk8550_sdam_2: nvram@7100 {