| Message ID | 20250324-sm6350-videocc-v2-4-cc22386433f4@fairphone.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add video clock controller for SM6350 | expand |
On Mon, Mar 24, 2025 at 09:41:04AM +0100, Luca Weiss wrote: > Add a node for the videocc found on the SM6350 SoC. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
On 3/24/25 9:41 AM, Luca Weiss wrote: > Add a node for the videocc found on the SM6350 SoC. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 42f9d16c2fa6da66a8bb524a33c2687a1e4b40e0..4498d6dfd61a7e30a050a8654d54dae2d06c220c 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -1952,6 +1952,20 @@ usb_1_dwc3_ss_out: endpoint { > }; > }; > > + videocc: clock-controller@aaf0000 { > + compatible = "qcom,sm6350-videocc"; > + reg = <0x0 0x0aaf0000 0x0 0x10000>; > + clocks = <&gcc GCC_VIDEO_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>, > + <&sleep_clk>; > + clock-names = "iface", > + "bi_tcxo", > + "sleep_clk"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; You'll probably want to hook up some additional power domains here, see https://lore.kernel.org/linux-arm-msm/20250327-videocc-pll-multi-pd-voting-v3-0-895fafd62627@quicinc.com/ Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 42f9d16c2fa6da66a8bb524a33c2687a1e4b40e0..4498d6dfd61a7e30a050a8654d54dae2d06c220c 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1952,6 +1952,20 @@ usb_1_dwc3_ss_out: endpoint { }; }; + videocc: clock-controller@aaf0000 { + compatible = "qcom,sm6350-videocc"; + reg = <0x0 0x0aaf0000 0x0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>; + clock-names = "iface", + "bi_tcxo", + "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + cci0: cci@ac4a000 { compatible = "qcom,sm6350-cci", "qcom,msm8996-cci"; reg = <0x0 0x0ac4a000 0x0 0x1000>;
Add a node for the videocc found on the SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)