| Message ID | 20250402102723.219960-3-quic_mmanikan@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add PCIe support for IPQ5424 | expand |
On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: > Enable the PCIe controller and PHY nodes corresponding to RDP466. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- > Changes in V6: > - No change. > > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- > 1 file changed, 40 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > index 0fd0ebe0251d..1f89530cb035 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > @@ -82,6 +82,32 @@ &dwc_1 { > dr_mode = "host"; > }; > > +&pcie2 { > + pinctrl-0 = <&pcie2_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; No wake-gpios? Please document it in the commit message. > + > + status = "okay"; > +}; > + > +&pcie2_phy { > + status = "okay"; > +}; > + > +&pcie3 { > + pinctrl-0 = <&pcie3_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; > + > + status = "okay"; > +}; > + > +&pcie3_phy { > + status = "okay"; > +}; > + > &qusb_phy_0 { > vdd-supply = <&vreg_misc_0p925>; > vdda-pll-supply = <&vreg_misc_1p8>; > @@ -197,6 +223,20 @@ data-pins { > bias-pull-up; > }; > }; > + > + pcie2_default_state: pcie2-default-state { > + pins = "gpio31"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + pcie3_default_state: pcie3-default-state { > + pins = "gpio34"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > }; > > &uart1 { > @@ -216,4 +256,3 @@ &usb3 { > &xo_board { > clock-frequency = <24000000>; > }; > - > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts index 0fd0ebe0251d..1f89530cb035 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -82,6 +82,32 @@ &dwc_1 { dr_mode = "host"; }; +&pcie2 { + pinctrl-0 = <&pcie2_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie2_phy { + status = "okay"; +}; + +&pcie3 { + pinctrl-0 = <&pcie3_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie3_phy { + status = "okay"; +}; + &qusb_phy_0 { vdd-supply = <&vreg_misc_0p925>; vdda-pll-supply = <&vreg_misc_1p8>; @@ -197,6 +223,20 @@ data-pins { bias-pull-up; }; }; + + pcie2_default_state: pcie2-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pcie3_default_state: pcie3-default-state { + pins = "gpio34"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; }; &uart1 { @@ -216,4 +256,3 @@ &usb3 { &xo_board { clock-frequency = <24000000>; }; -
Enable the PCIe controller and PHY nodes corresponding to RDP466. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- Changes in V6: - No change. arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-)