@@ -51,10 +51,18 @@ properties:
phys:
maxItems: 1
+ deprecated: true
+ description:
+ This property is deprecated, instead of referencing this property from
+ the controller node, use the property from the PCIe root port node.
phy-names:
items:
- const: pciephy
+ deprecated: true
+ description:
+ Phandle to the register map node. This property is deprecated, and not
+ required to add in the root port also, as the root port has only one phy.
power-domains:
maxItems: 1
@@ -71,12 +79,18 @@ properties:
maxItems: 12
perst-gpios:
- description: GPIO controlled connection to PERST# signal
+ description: GPIO controlled connection to PERST# signal. This property is
+ deprecated, instead of referencing this property from the controller node,
+ use the reset-gpios property from the root port node.
maxItems: 1
+ deprecated: true
wake-gpios:
- description: GPIO controlled connection to WAKE# signal
+ description: GPIO controlled connection to WAKE# signal. This property is
+ deprecated, instead of referencing this property from the controller node,
+ use the property from the PCIe root port node.
maxItems: 1
+ deprecated: true
vddpe-3v3-supply:
description: PCIe endpoint power supply
@@ -85,6 +99,24 @@ properties:
opp-table:
type: object
+patternProperties:
+ "^pcie@":
+ type: object
+ $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ wake-gpios:
+ description: GPIO controlled connection to WAKE# signal
+ maxItems: 1
+
+ unevaluatedProperties: false
+
required:
- reg
- reg-names
@@ -162,9 +162,6 @@ examples:
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
<0x100 &apps_smmu 0x1c81 0x1>;
- phys = <&pcie1_phy>;
- phy-names = "pciephy";
-
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>;
@@ -173,7 +170,18 @@ examples:
resets = <&gcc GCC_PCIE_1_BCR>;
reset-names = "pci";
- perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&pp3300_ssd>;
+ pcie1_port0: pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ phys = <&pcie1_phy>;
+
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ };
};
};
Move the phy, phy-names, wake-gpio's to the pcie root port node instead of the bridge node, as agreed upon in multiple places one instance is[1]. Update the qcom,pcie-common.yaml to include the phy, phy-names, and wake-gpios properties in the root port node. There is already reset-gpios defined for PERST# in pci-bus-common.yaml, start using that property instead of perst-gpio. For backward compatibility, do not remove any existing properties in the bridge node. [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- .../devicetree/bindings/pci/qcom,pcie-common.yaml | 36 ++++++++++++++++++++-- .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 16 +++++++--- 2 files changed, 46 insertions(+), 6 deletions(-)