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Thu, 3 Aug 2023 00:08:25 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::5111:16e8:5afe:1da1]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::5111:16e8:5afe:1da1%6]) with mapi id 15.20.6631.045; Thu, 3 Aug 2023 00:08:25 +0000 From: Jason Gunthorpe To: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang Cc: Lu Baolu , Dmitry Osipenko , Marek Szyprowski , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: [PATCH v6 21/25] iommu: Require a default_domain for all iommu drivers Date: Wed, 2 Aug 2023 21:08:08 -0300 Message-ID: <21-v6-e8114faedade+425-iommu_all_defdom_jgg@nvidia.com> In-Reply-To: <0-v6-e8114faedade+425-iommu_all_defdom_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR15CA0060.namprd15.prod.outlook.com (2603:10b6:208:237::29) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|DM4PR12MB6085:EE_ X-MS-Office365-Filtering-Correlation-Id: cbfdc969-30c6-4631-8dd1-08db93b5bca0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: p3O3sZLp0XC6vhq3e7aJ13nuVx/6ULMXQiiPUb4QWnsRgdO3Y0guxcQDE1ZzsuezQ2wa/4kp2zv9r21wZXfGs7VP7ARFSQlXvoTrEQ8wSVLPhTBVn9fdk/O9uX5xY/QLN7a8W+W0M0OkuvMpOAV9ETJLIDy7l+wKIK9DHkwf38/7L8SIB9p/QoOdMoXH3IIDCxBm8U1M7/T6l5Dm8u/DgwPtUfRJZWR8k7HltLv6gD3yaHWMPPw7Mnf7eDrUXVP9vM+CG1bPPlwynsyERxWCwcnrSVgY11m6j4UEGVJ7R12eyhOEaPDdUOY8+zqA1eKZGZfTLIK5gzi7uUg+BP2D+YnQhNEO2a4xngCHVzFw3l3fzXlSaIjkUYQWbadCArFVSgLTT6DKG8BqWxssn23pUpjdW2/mvrrtY6OFDm0F2ptPA23SHd5ytFkI1EjQ93Us0FGw7l08S0lH4zAVc4iQo6/dUS0X8/Z2mz1rgOzhZZVTl66e856uzuEDcB3ly9We5LmW9AFfFnkJ/PAzZGvflTxzHz009/ppcHUJyFo4/UAoJzQD5evVf/7yFTdH3dJ/2K0Ju3zJX6621megN/cIlQGgXaelHouGgKVehEgfXjvYvQM1xoXkKY/MAVQiA9Z3ZLeE6ZyCiITtl6UIxeKrSr2iA9gjWAQrhHC4mmfA1BQ8+yHu6mOWLAlP91h8pPi94/89Niz5UWTUj8i0DSNjJNc+PGLb9pBpaM/uXTyiAf9xGeZjmB+2/Tx80fZISqvqADkQZDHNn0n0vxtKFF8h6fDJUA0yonpyETPlPXMdX1lfq7RU+r7gNcJ/tsaQ2BRQtpUWfh+p3EJBDbQ7fVl2vkZjIaPXcFnJc2SCDFmJIH/0UmtVhV8UyiYqLHh1Pv+cuZl8rsUSKjwH/Stfv9HpBsmJ0xa5tjmz9XItk2qnNrORJcGvDrp9JkForST0vrjRNE0Yh+SVRoqBPZh2cKo1sTI4NWA6aeebIMTLDvlNjOVvgviTvmDxNqwVPwjQS6qgh5qsPMzy4CirC+Qh5nin/Jv/2QRiJn0BrWp3Gkvamtwxj1R04KE6JPR0H3/UX7WNQ7lvpayd2AGWxp3sTYIj3w4EyUqiTMukA4j4IHPB1AMs/XJxYXzhrUmtELvCBa//1y+1PJc4rm+WoiVzSMYlkQ4fQ9hzcoypJ4iJLKPFXUCWYttixuPYsBy+H/oEhn/W82Nh3iHJrjDR53YMImTMs2yElTGCAjmAFyUizF52CMDG4Y8ON/yvj2AXdEwkK4wl64YBOXKNND5ttl7rhK/XuSJo/My4tUuLGhJIOiz2rf04WZZzLcpC0wlIhYPnddaUAWgFo0bfpGo4BxqVCux5uNPRluxUzXnH2/F+CSbatMgi7UqqcKglZ41QVGTIF8cvISZMLl0i1oNPOG2MBkZs2Ml4ogEIrD4JH9blbto+rri/b0qPEi40U6325/y4Looz9qmwtzhaIMF/ndXWxpgj9M3NdSOdLW9zZd5jRDngsDMdmi9QnlciHo+9nIT2rOEwij5VMGlc1AywmkVLnOxvzPjP7Fy3xrjtfTz0Y15J08UzNjR0sKaUxetW7hS5wl8P X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: cbfdc969-30c6-4631-8dd1-08db93b5bca0 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Aug 2023 00:08:16.9873 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6RJFJlX5DE9eXyH3+F6e/oMh6mi1Mxnikj2ZJjbXb1UlaCF340vK2J/0QvtMCtUz X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6085 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At this point every iommu driver will cause a default_domain to be selected, so we can finally remove this gap from the core code. The following table explains what each driver supports and what the resulting default_domain will be: ops->defaut_domain IDENTITY DMA PLATFORM v ARM32 dma-iommu ARCH amd/iommu.c Y Y N/A either apple-dart.c Y Y N/A either arm-smmu.c Y Y IDENTITY either qcom_iommu.c G Y IDENTITY either arm-smmu-v3.c Y Y N/A either exynos-iommu.c G Y IDENTITY either fsl_pamu_domain.c Y N/A N/A PLATFORM intel/iommu.c Y Y N/A either ipmmu-vmsa.c G Y IDENTITY either msm_iommu.c G IDENTITY N/A mtk_iommu.c G Y IDENTITY either mtk_iommu_v1.c G IDENTITY N/A omap-iommu.c G IDENTITY N/A rockchip-iommu.c G Y IDENTITY either s390-iommu.c Y Y N/A N/A PLATFORM sprd-iommu.c Y N/A DMA sun50i-iommu.c G Y IDENTITY either tegra-smmu.c G Y IDENTITY IDENTITY virtio-iommu.c Y Y N/A either spapr Y Y N/A N/A PLATFORM * G means ops->identity_domain is used * N/A means the driver will not compile in this configuration ARM32 drivers select an IDENTITY default domain through either the ops->identity_domain or directly requesting an IDENTIY domain through alloc_domain(). In ARM64 mode tegra-smmu will still block the use of dma-iommu.c and forces an IDENTITY domain. S390 uses a PLATFORM domain to represent when the dma_ops are set to the s390 iommu code. fsl_pamu uses an IDENTITY domain. POWER SPAPR uses PLATFORM and blocking to enable its weird VFIO mode. The x86 drivers continue unchanged. After this patch group->default_domain is only NULL for a short period during bus iommu probing while all the groups are constituted. Otherwise it is always !NULL. This completes changing the iommu subsystem driver contract to a system where the current iommu_domain always represents some form of translation and the driver is continuously asserting a definable translation mode. It resolves the confusion that the original ops->detach_dev() caused around what translation, exactly, is the IOMMU performing after detach. There were at least three different answers to that question in the tree, they are all now clearly named with domain types. Tested-by: Heiko Stuebner Tested-by: Niklas Schnelle Tested-by: Steven Price Tested-by: Marek Szyprowski Tested-by: Nicolin Chen Reviewed-by: Lu Baolu Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index dada2c00d78ca4..1533e65d075bce 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1819,10 +1819,12 @@ static int iommu_get_default_domain_type(struct iommu_group *group, * ARM32 drivers supporting CONFIG_ARM_DMA_USE_IOMMU can declare an * identity_domain and it will automatically become their default * domain. Later on ARM_DMA_USE_IOMMU will install its UNMANAGED domain. - * Override the selection to IDENTITY if we are sure the driver supports - * it. + * Override the selection to IDENTITY. */ - if (IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) && ops->identity_domain) { + if (IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)) { + static_assert(!(IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) && + IS_ENABLED(CONFIG_IOMMU_DMA))); + type = IOMMU_DOMAIN_IDENTITY; if (best_type && type && best_type != type) return -1; @@ -2920,18 +2922,9 @@ static int iommu_setup_default_domain(struct iommu_group *group, if (req_type < 0) return -EINVAL; - /* - * There are still some drivers which don't support default domains, so - * we ignore the failure and leave group->default_domain NULL. - */ dom = iommu_group_alloc_default_domain(group, req_type); - if (!dom) { - /* Once in default_domain mode we never leave */ - if (group->default_domain) - return -ENODEV; - group->default_domain = NULL; - return 0; - } + if (!dom) + return -ENODEV; if (group->default_domain == dom) return 0;