diff mbox series

arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address

Message ID 464822ba-8bf9-a287-bf6c-05988c7d9f88@free.fr (mailing list archive)
State Accepted
Headers show
Series arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address | expand

Commit Message

Marc Gonzalez April 5, 2019, 10:36 a.m. UTC
blsp1_i2c1 is at 0x0c175000
blsp2_i2c5 is at 0x0c1ba000 (the label is correct)

Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jeffrey Hugo April 5, 2019, 2:02 p.m. UTC | #1
On 4/5/2019 4:36 AM, Marc Gonzalez wrote:
> blsp1_i2c1 is at 0x0c175000
> blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
> 
> Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> ---
>   arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index a692cbc8dd84..57426bde7580 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -982,7 +982,7 @@
>   
>   		blsp2_i2c5: i2c@c1ba000 {
>   			compatible = "qcom,i2c-qup-v2.2.1";
> -			reg = <0x0c175000 0x600>;
> +			reg = <0x0c1ba000 0x600>;
>   			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
>   
>   			clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
> 

Whoops.  Nice catch.

Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index a692cbc8dd84..57426bde7580 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -982,7 +982,7 @@ 
 
 		blsp2_i2c5: i2c@c1ba000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
-			reg = <0x0c175000 0x600>;
+			reg = <0x0c1ba000 0x600>;
 			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 
 			clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,