| Message ID | 6da00186-e7c9-c93d-a80a-65eda2516451@free.fr (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [RESEND,v2] arm64: dts: qcom: msm8998: Add rpmcc node | expand |
On 1/30/2019 10:01 PM, Marc Gonzalez wrote: > Add MSM8998 Resource Power Manager Clock Controller DT node. > > Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> > --- > Detach this patch from UFS series > Resend because SMTP server was blacklisted. > --- > arch/arm64/boot/dts/qcom/msm8998.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > index a6d66cf77403..6f4f4b79853b 100644 > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > @@ -3,6 +3,7 @@ > > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/clock/qcom,gcc-msm8998.h> > +#include <dt-bindings/clock/qcom,rpmcc.h> > #include <dt-bindings/gpio/gpio.h> > > / { > @@ -266,6 +267,11 @@ > rpm_requests: rpm-requests { > compatible = "qcom,rpm-msm8998"; > qcom,glink-channels = "rpm_requests"; > + > + rpmcc: clock-controller { > + compatible = "qcom,rpmcc-msm8998", "qcom,rpmcc"; > + #clock-cells = <1>; > + }; > }; > }; > > Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index a6d66cf77403..6f4f4b79853b 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -3,6 +3,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8998.h> +#include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/gpio/gpio.h> / { @@ -266,6 +267,11 @@ rpm_requests: rpm-requests { compatible = "qcom,rpm-msm8998"; qcom,glink-channels = "rpm_requests"; + + rpmcc: clock-controller { + compatible = "qcom,rpmcc-msm8998", "qcom,rpmcc"; + #clock-cells = <1>; + }; }; };