From patchwork Wed Mar 20 13:17:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 10861699 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B5875139A for ; Wed, 20 Mar 2019 13:19:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A29BF29AEB for ; Wed, 20 Mar 2019 13:19:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 96AA829B83; Wed, 20 Mar 2019 13:19:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_WEB autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B2A729AEB for ; Wed, 20 Mar 2019 13:19:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728359AbfCTNTs (ORCPT ); Wed, 20 Mar 2019 09:19:48 -0400 Received: from mail-pf1-f176.google.com ([209.85.210.176]:38596 "EHLO mail-pf1-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728352AbfCTNTr (ORCPT ); Wed, 20 Mar 2019 09:19:47 -0400 Received: by mail-pf1-f176.google.com with SMTP id 10so1931598pfo.5 for ; Wed, 20 Mar 2019 06:19:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=n8wsQ7ixOIiYIm36smSOqEN/oeuVV2Uzvv7QGvE7MK8=; b=bSX2woIfjmWZ6MS1ON7RyACNxWEuYrjBwDPqUi1qLKA3hblgxdLaH48iks0zZsZJEb OP6oO6NXNMEH4nf/TXWEf9rm/aGY09HYEtjkVIQSoDuDIRIxf0KamS6SzE5DVIe3gn35 XkLLALg20+EeVJ4Yq7hzJSvET5/aU3E87/jSJxFHnSw3M71nDkDk6UTWTDHsRKB22iAz 0AekHMAh8EFKvweDfVrsCO3QmUkBBEEmqLPM4OwShNP1pa+wzVV24A4mm9fOtbNVxDrp MuRV2HptsYAmCL8YC5Nt8/E1IpBj5d92gZ9XR51WMIJhySSWXsQBnd9ByXrKa3KTvEUs eh8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=n8wsQ7ixOIiYIm36smSOqEN/oeuVV2Uzvv7QGvE7MK8=; b=Z4jcGlOqMrqSu92f1dlLk4a+jTKNLC+Ehs075Tp55cQmaMUd/hhrDiyJ0UpcGHpPm3 K/j30Da56O9xd0+HmtEi+/HazoME3KhFIJwZj42EFCrJprYpQ7JGWTfG2sB/PxTX7USO td/Gq1sGhYfwJDKra3E6asWWu+btNooF29nkbYNZvYKFKMH4zWbEhsZvI6lA2AlZy97y su2TgCNFnvMFX6ijo2fQANSntgimEjmW2M9nzK7i85K2e8hnZMDOuZ1nRgmfXztzHBRs k9k09dc7tEPuZa9QmmDFAa93UdNnMIPjOZ91PBtPwfNKCjeEGqbWFkPFj6/SvEPgAffu nfdw== X-Gm-Message-State: APjAAAXr6jthM2QrpKnmSm9/nsMkUADXHcqk1g0LsrxJwebV+9v4j9c9 srLl9ksxy9gLO6W+gDtZlj9lYA== X-Google-Smtp-Source: APXvYqw+R4H62H+aFB9U/nouAhJIMV5gK2XbkUBmyEBYKM7iXny9gigdjrWnO36va9rK+Ag+8h3W4Q== X-Received: by 2002:a17:902:b097:: with SMTP id p23mr8326788plr.36.1553087986870; Wed, 20 Mar 2019 06:19:46 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id i79sm5913448pfj.28.2019.03.20.06.19.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:19:45 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCHv3 19/23] dt: thermal: tsens: Add bindings for qcs404 Date: Wed, 20 Mar 2019 18:47:59 +0530 Message-Id: <7e4fd2f96fecc4daaee6ff87e486891b2c0764f9.1553086065.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP qcs404 uses v1 of the TSENS IP block. Create a fallback DT property "qcom,tsens-v1" to gather common code Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- .../devicetree/bindings/thermal/qcom-tsens.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt index 1d9e8cf61018..673cc1831ee9 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt @@ -6,11 +6,14 @@ Required properties: - "qcom,msm8916-tsens" (MSM8916) - "qcom,msm8974-tsens" (MSM8974) - "qcom,msm8996-tsens" (MSM8996) + - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404) - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) The generic "qcom,tsens-v2" property must be used as a fallback for any SoC with version 2 of the TSENS IP. MSM8996 is the only exception because the generic property did not exist when support was added. + Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for + any SoC with version 1 of the TSENS IP. - reg: Address range of the thermal registers. New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM @@ -39,3 +42,14 @@ tsens0: thermal-sensor@c263000 { #qcom,sensors = <13>; #thermal-sensor-cells = <1>; }; + +Example 3 (for any platform containing v1 of the TSENS IP): +tsens: thermal-sensor@4a9000 { + compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "calib"; + #qcom,sensors = <10>; + #thermal-sensor-cells = <1>; + };