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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Vinod Koul , Andrew Lunn , Heiner Kallweit , Russell King , Richard Cochran , Giuseppe Cavallaro CC: "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-arm-msm@vger.kernel.org" , dl-S32 Subject: [PATCH v2 7/7] net: stmmac: dwmac-s32cc: Read PTP clock rate when ready Thread-Topic: [PATCH v2 7/7] net: stmmac: dwmac-s32cc: Read PTP clock rate when ready Thread-Index: Adrxt+I1bcYKj11CSHK5cfqUXnIxlw== Date: Sun, 18 Aug 2024 21:52:53 +0000 Message-ID: Accept-Language: cs-CZ, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-ms-traffictypediagnostic: AM9PR04MB8506:EE_|AS5PR04MB9856:EE_ x-ms-office365-filtering-correlation-id: 143b2633-3059-4e06-e238-08dcbfd01cbb x-ms-exchange-sharedmailbox-routingagent-processed: True x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|366016|1800799024|7416014|376014|921020|38070700018; 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On S32G/R the clock is not ready and returns 0. Postpone reading of the clock on PTP init. Co-developed-by: Andrei Botila Signed-off-by: Andrei Botila Signed-off-by: Jan Petrous (OSS) Reviewed-by: Jacob Keller --- drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c index 8daa01d01f29..92c51005cbed 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c @@ -149,6 +149,18 @@ static void s32cc_fix_mac_speed(void *priv, unsigned int speed, unsigned int mod dev_err(gmac->dev, "Can't set tx clock\n"); } +static void s32cc_gmac_ptp_clk_freq_config(struct stmmac_priv *priv) +{ + struct plat_stmmacenet_data *plat = priv->plat; + + if (!plat->clk_ptp_ref) + return; + + plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); + + netdev_dbg(priv->dev, "PTP rate %lu\n", plat->clk_ptp_rate); +} + static int s32cc_dwmac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat; @@ -204,6 +216,7 @@ static int s32cc_dwmac_probe(struct platform_device *pdev) plat->init = s32cc_gmac_init; plat->exit = s32cc_gmac_exit; plat->fix_mac_speed = s32cc_fix_mac_speed; + plat->ptp_clk_freq_config = s32cc_gmac_ptp_clk_freq_config; plat->bsp_priv = gmac;