| Message ID | TYZPR01MB5556F902BF64AF857C3ABD44C9E5A@TYZPR01MB5556.apcprd01.prod.exchangelabs.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2] arm64: dts: ipq5018: Correct uart1_pins pinconf | expand |
On 31/08/2023 17:34, Ziyang Huang wrote: > In pinctrl, the pinconfigs for uart are named "blspX_uartY". > X is the UART ID. Starts from 1. > 1-6 are in BLSP Block 1. > 7-12 are in BLSP Block 2. > Y is the index of mux config. Starts from 0. > > In dts, the serials are also named "blspX_uartY", but with different logic. > X is the BLSP Block ID. Starts from 1. > Y is the uart id inside block. > In "ipq6018.dtsi" and "ipq8074.dtsi", it starts from 1. > But in "ipq5332.dtsi" and "ipq9574.dtsi", it starts from 0. > > +-----------------+-----------------+-------------+-----------------+ > | Block ID | ID inside Block | dts name | pinconfig name | > | (Starts from 1) | (Starts from 1) | | | > +-----------------+-----------------+-------------+-----------------+ > | 1 | 1 | blsp1_uart1 | blsp0_uartY | > | 1 | 2 | blsp1_uart2 | blsp1_uartY | > | 1 | 6 | blsp1_uart6 | blsp5_uartY | > | 2 | 1 | blsp2_uart1 | blsp6_uartY | > | 2 | 6 | blsp2_uart6 | blsp12_uartY | > +-----------------+-----------------+-------------+-----------------+ > > In "ipq5018.dts", "blsp1_uart1" (dts name) is the first serial (confimed > by the address), So its pinconfig should be "blsp0_uart0" (pinconfig name, > use GPIO 20 and 21) or "blsp0_uart1" (pinconfig name, use GPIO 28 and 29). > > Fixes: 570006756a16 ("arm64: dts: Add ipq5018 SoC and rdp432-c2 board support") > Signed-off-by: Ziyang Huang <hzyitc@outlook.com> > --- > Changes since v1 > - Use corrent name in From > > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > index 9f13d2dcdfd5..91b98020e1c6 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > @@ -104,10 +104,10 @@ tlmm: pinctrl@1000000 { > #interrupt-cells = <2>; > > uart1_pins: uart1-state { > - pins = "gpio31", "gpio32", "gpio33", "gpio34"; > - function = "blsp1_uart1"; > + pins = "gpio28", "gpio29"; > + function = "blsp0_uart1"; > drive-strength = <8>; > - bias-pull-down; > + bias-disabled; > }; > }; > So this change will have the effect of changing the console on ipq5018-rdp432 from gpio31-gpio34 to gpio28, gpio29. Have you verified that change on hardware or the schematic ? https://forum.openwrt.org/t/add-support-for-xiaomi-redmi-ax5400-white-version/140879/22?page=2 This has the wrong UART pinout ? Is this change something that should be expressed for a particular board ? --- bod
Hi Ziyang, <...> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> index 9f13d2dcdfd5..91b98020e1c6 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> @@ -104,10 +104,10 @@ tlmm: pinctrl@1000000 { >> #interrupt-cells = <2>; >> uart1_pins: uart1-state { >> - pins = "gpio31", "gpio32", "gpio33", "gpio34"; >> - function = "blsp1_uart1"; >> + pins = "gpio28", "gpio29"; >> + function = "blsp0_uart1"; >> drive-strength = <8>; >> - bias-pull-down; >> + bias-disabled; >> }; >> }; > > So this change will have the effect of changing the console on > ipq5018-rdp432 from gpio31-gpio34 to gpio28, gpio29. > > Have you verified that change on hardware or the schematic ? > > https://forum.openwrt.org/t/add-support-for-xiaomi-redmi-ax5400-white-version/140879/22?page=2 > > > This has the wrong UART pinout ? > > Is this change something that should be expressed for a particular board ? Infact again checked it, the correct pins are "gpio20", "gpio21". It works so far because u-boot has configured it. Regards, Sricharan
在 2023/9/1 4:19, Bryan O'Donoghue 写道: > On 31/08/2023 17:34, Ziyang Huang wrote: >> In pinctrl, the pinconfigs for uart are named "blspX_uartY". >> X is the UART ID. Starts from 1. >> 1-6 are in BLSP Block 1. >> 7-12 are in BLSP Block 2. >> Y is the index of mux config. Starts from 0. >> >> In dts, the serials are also named "blspX_uartY", but with different >> logic. >> X is the BLSP Block ID. Starts from 1. >> Y is the uart id inside block. >> In "ipq6018.dtsi" and "ipq8074.dtsi", it starts from 1. >> But in "ipq5332.dtsi" and "ipq9574.dtsi", it starts from 0. >> >> +-----------------+-----------------+-------------+-----------------+ >> | Block ID | ID inside Block | dts name | pinconfig name | >> | (Starts from 1) | (Starts from 1) | | | >> +-----------------+-----------------+-------------+-----------------+ >> | 1 | 1 | blsp1_uart1 | blsp0_uartY | >> | 1 | 2 | blsp1_uart2 | blsp1_uartY | >> | 1 | 6 | blsp1_uart6 | blsp5_uartY | >> | 2 | 1 | blsp2_uart1 | blsp6_uartY | >> | 2 | 6 | blsp2_uart6 | blsp12_uartY | >> +-----------------+-----------------+-------------+-----------------+ >> >> In "ipq5018.dts", "blsp1_uart1" (dts name) is the first serial (confimed >> by the address), So its pinconfig should be "blsp0_uart0" (pinconfig >> name, >> use GPIO 20 and 21) or "blsp0_uart1" (pinconfig name, use GPIO 28 and >> 29). >> >> Fixes: 570006756a16 ("arm64: dts: Add ipq5018 SoC and rdp432-c2 board >> support") >> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> >> --- >> Changes since v1 >> - Use corrent name in From >> >> arch/arm64/boot/dts/qcom/ipq5018.dtsi | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> index 9f13d2dcdfd5..91b98020e1c6 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >> @@ -104,10 +104,10 @@ tlmm: pinctrl@1000000 { >> #interrupt-cells = <2>; >> uart1_pins: uart1-state { >> - pins = "gpio31", "gpio32", "gpio33", "gpio34"; >> - function = "blsp1_uart1"; >> + pins = "gpio28", "gpio29"; >> + function = "blsp0_uart1"; >> drive-strength = <8>; >> - bias-pull-down; >> + bias-disabled; >> }; >> }; > > So this change will have the effect of changing the console on > ipq5018-rdp432 from gpio31-gpio34 to gpio28, gpio29. > No. GPIO31-34 can be configured to "blsp1_uart1" (pinconf name). But it belongs to UART2 (Index starts from 1). For UART1, there are only two groups - "blsp0_uart0" (GPIO20 and 21) and "blsp0_uart1" (GPIO 28 and 29). Your device can work with current code because of U-Boot. U-Boot configured correct GPIOs for the UART and pinctrl doesn't clear the pinmux settings of unmentioned GPIOs. > Have you verified that change on hardware or the schematic ? > > https://forum.openwrt.org/t/add-support-for-xiaomi-redmi-ax5400-white-version/140879/22?page=2 > > This has the wrong UART pinout ? > You can try to export the GPIO 20,21 and 28,29 by sysfs to clear the pinmux settings and then your serial doesn't work. > Is this change something that should be expressed for a particular board ? > Yes, this is device-special. Some boards use GPIO20 and 21 while others use GPIO28 and 29. But we have defined a wrong value here. At lease, it should be a correct demo. Or should I leave 2 configs here to let device choose? > --- > bod
On 01/09/2023 14:09, Ziyang Huang wrote: >> Is this change something that should be expressed for a particular >> board ? >> > > Yes, this is device-special. Some boards use GPIO20 and 21 while others > use GPIO28 and 29. But we have defined a wrong value here. At lease, it > should be a correct demo. Or should I leave 2 configs here to let device > choose? https://gist.github.com/ptpt52/ae47eb7b86ce2911df06d067152f02ac U-Boot 2016.01 (Jul 08 2021 - 07:14:42 +0000) DRAM: smem ram ptable found: ver: 1 len: 4 256 MiB TEST- SPI_ADDR_LEN=3 SF: Detected XM25QU128C with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial@78AF000 Out: serial@78AF000 Err: serial@78AF000 So, we're saying the correct default console is blsp0_uart0 ? https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016/-/blob/5343739b4070bcec2fecd72f758c16adc31a3083/arch/arm/dts/ipq5018-mp03.3.dts --- bod
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 9f13d2dcdfd5..91b98020e1c6 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -104,10 +104,10 @@ tlmm: pinctrl@1000000 { #interrupt-cells = <2>; uart1_pins: uart1-state { - pins = "gpio31", "gpio32", "gpio33", "gpio34"; - function = "blsp1_uart1"; + pins = "gpio28", "gpio29"; + function = "blsp0_uart1"; drive-strength = <8>; - bias-pull-down; + bias-disabled; }; };
In pinctrl, the pinconfigs for uart are named "blspX_uartY". X is the UART ID. Starts from 1. 1-6 are in BLSP Block 1. 7-12 are in BLSP Block 2. Y is the index of mux config. Starts from 0. In dts, the serials are also named "blspX_uartY", but with different logic. X is the BLSP Block ID. Starts from 1. Y is the uart id inside block. In "ipq6018.dtsi" and "ipq8074.dtsi", it starts from 1. But in "ipq5332.dtsi" and "ipq9574.dtsi", it starts from 0. +-----------------+-----------------+-------------+-----------------+ | Block ID | ID inside Block | dts name | pinconfig name | | (Starts from 1) | (Starts from 1) | | | +-----------------+-----------------+-------------+-----------------+ | 1 | 1 | blsp1_uart1 | blsp0_uartY | | 1 | 2 | blsp1_uart2 | blsp1_uartY | | 1 | 6 | blsp1_uart6 | blsp5_uartY | | 2 | 1 | blsp2_uart1 | blsp6_uartY | | 2 | 6 | blsp2_uart6 | blsp12_uartY | +-----------------+-----------------+-------------+-----------------+ In "ipq5018.dts", "blsp1_uart1" (dts name) is the first serial (confimed by the address), So its pinconfig should be "blsp0_uart0" (pinconfig name, use GPIO 20 and 21) or "blsp0_uart1" (pinconfig name, use GPIO 28 and 29). Fixes: 570006756a16 ("arm64: dts: Add ipq5018 SoC and rdp432-c2 board support") Signed-off-by: Ziyang Huang <hzyitc@outlook.com> --- Changes since v1 - Use corrent name in From arch/arm64/boot/dts/qcom/ipq5018.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)