From patchwork Wed Dec 12 10:17:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 10725969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE227112E for ; Wed, 12 Dec 2018 10:18:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD16B288CB for ; Wed, 12 Dec 2018 10:18:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C0C2E28DB6; Wed, 12 Dec 2018 10:18:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_WEB autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 632C1288CB for ; Wed, 12 Dec 2018 10:18:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727122AbeLLKST (ORCPT ); Wed, 12 Dec 2018 05:18:19 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:39647 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727101AbeLLKSS (ORCPT ); Wed, 12 Dec 2018 05:18:18 -0500 Received: by mail-wm1-f65.google.com with SMTP id f81so5267399wmd.4 for ; Wed, 12 Dec 2018 02:18:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=8mNwIcZt5Lt2n8wj4VXXXoeux1aENwpBV0Y6Q1/l4rk=; b=KAIVvxYG7SHFmcDvNIucb0RamOZIUfDB7Z7dq0cmWNz59LBeTh/QBjfzHJtTq2pO46 XTXCmlsZpOBzj0w1zUXH5EXQHQSvvBE6YBLHPZ8IqLWV65fil32PwxW5R+keFYV3v7CZ 5NY4KNEOfapmpRdk1fCBy37XAl2pF+mcd+Tu0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=8mNwIcZt5Lt2n8wj4VXXXoeux1aENwpBV0Y6Q1/l4rk=; b=rivm5qCDNcSFqsKdJwzQevP57pL6yoFaKqRQSzpnnb4Fbn98dfFKJ1n8TY1la4LprK SGOg+NCA+n3R4lEhhLzp3s56+QfWy88rhTbD3jPoem+LAPcA+/uW+lNWD7dkTQajyiV8 raCa6Ohi0qgeg6463unfKiRnH7dZ1BI+4UzIGGZMF/nz+qQwJSSOvreWm1V+cH5/DqfT 8ZPhg17nqvT60Xrr6QMNsbpYccjf2cy+jZ7nKprPBYOLQOyGlXIS2G57ZrQo2APqrtn5 5lO0Thy9o/pbK4riHWBD8Y6fHIBjPVSqWqT+f4mRDMPNN+u08S1I+OeN0bIcuvZKZDM0 wP3w== X-Gm-Message-State: AA+aEWa/T07Nk6ySlrfnfTifXND0CfKg/DYiy7/d1Nt4EOmaD0tC/Ecy hDcGpwuX+tcATUGeLpfW135e4w== X-Google-Smtp-Source: AFSGD/WLxmOOato7dJWuftCn8771cJE+uI0oGSdZ5vL5oun0r0EUzlxDddBH+3rFDVEuati2vRqfjQ== X-Received: by 2002:a1c:8f95:: with SMTP id r143mr5519629wmd.65.1544609896321; Wed, 12 Dec 2018 02:18:16 -0800 (PST) Received: from localhost ([49.248.93.253]) by smtp.gmail.com with ESMTPSA id w8sm17862512wrv.7.2018.12.12.02.18.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 12 Dec 2018 02:18:15 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, mka@chromium.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, David Brown , Rob Herring , Mark Rutland Subject: [PATCH v1 2/2] arm64: dts: pms405: Export PMIC temperature to thermal framework Date: Wed, 12 Dec 2018 15:47:55 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PMS405 PMIC has an ADC that exposes the on-die temperature that we wire up to spmi-temp-alarm thermal driver. This allows the PMIC temperature to be exposed to Linux through the thermal framework. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/pms405.dtsi | 79 ++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index ad2b62dfc9f6..1bb836d1e8aa 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -3,6 +3,32 @@ #include #include +#include +#include + +/ { + thermal-zones { + pms405 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&pms405_temp>; + + trips { + pms405_alert0: pms405-alert0 { + temperature = <105000>; + hysteresis = <2000>; + type = "passive"; + }; + pms405_crit: pms405-crit { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; +}; &spmi_bus { pms405_0: pms405@0 { @@ -45,6 +71,59 @@ }; }; + pms405_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pms405_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pms405_adc: adc@3100 { + compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + ref_gnd { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + vph_pwr { + reg = ; + qcom,pre-scaling = <1 3>; + }; + + die_temp { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_100k_pu { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + amux_thm1_100k_pu { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + amux_thm3_100k_pu { + reg = ; + qcom,pre-scaling = <1 1>; + }; + }; + rtc@6000 { compatible = "qcom,pm8941-rtc"; reg = <0x6000>;