Message ID | 20210112042623.6316-4-chaitanya.kulkarni@wdc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | nvmet: add ZBD backend support | expand |
The Command Set Identifier has no "NVM" in its name. > +static inline bool nvmet_cc_css_check(u8 cc_css) > +{ > + switch (cc_css <<= NVME_CC_CSS_SHIFT) { > + case NVME_CC_CSS_NVM: > + return true; > + default: > + return false; > + } > +} This hunk looks misplaced, it isn't very useful on its own, but should go together with the multiple command set support.
On 1/11/21 23:27, Christoph Hellwig wrote: > The Command Set Identifier has no "NVM" in its name. > > >> +static inline bool nvmet_cc_css_check(u8 cc_css) >> +{ >> + switch (cc_css <<= NVME_CC_CSS_SHIFT) { >> + case NVME_CC_CSS_NVM: >> + return true; >> + default: >> + return false; >> + } >> +} > This hunk looks misplaced, it isn't very useful on its own, but > should go together with the multiple command set support. > We advertise the support for command sets supported in nvmet_init_cap() -> ctrl->cap = (1ULL << 37). This results in nvme_enable_ctrl() setting the ctrl->ctrl_config -> NVME_CC_CSS_NVM. In current code in nvmet_start_ctrl() -> nvmet_cc_css(ctrl->cc) != 0 checks if value is not = 0 but doesn't use the macro used by the host. Above function does that also makes it helper that we use in the next patch where cc_css value is != 0 but NVME_CC_CSS_CSI with ctrl->cap set to 1ULL << 43. With code flow in [1] above function is needed to make sure css value matches the value set by the host using the same macro in nvme_enable_ctrl() NVME_CC_CSS_NVM. Otherwise patch looks incomplete and adding check for the CSS NVM with CSS_CSI looks mixing up things to me. Are you okay with that ? [1] nvme_enable_ctrl() ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config) nvmf_reg_write32() nvmet_parse_fabrics_cmd() nvmet_execute_prop_set() nvmet_update_ctrl() new cc != old cc == true -> nvmet_start_ctrl() nvmet_cc_css_check(ctrl->css) Check if host has set the for controller config NVME_CC_CSS_NVM as we are supporting default CSS_NVM which ctrl needs to set irrespective of other CC_CSS values.
On Wed, Jan 13, 2021 at 04:16:51AM +0000, Chaitanya Kulkarni wrote: > We advertise the support for command sets supported in > nvmet_init_cap() -> ctrl->cap = (1ULL << 37). This results in > nvme_enable_ctrl() setting the ctrl->ctrl_config -> NVME_CC_CSS_NVM. > In current code in nvmet_start_ctrl() -> nvmet_cc_css(ctrl->cc) != 0 > checks if value is not = 0 but doesn't use the macro used by the host. > Above function does that also makes it helper that we use in the next > patch where cc_css value is != 0 but NVME_CC_CSS_CSI with > ctrl->cap set to 1ULL << 43. > > With code flow in [1] above function is needed to make sure css value > matches the value set by the host using the same macro in > nvme_enable_ctrl() NVME_CC_CSS_NVM. Otherwise patch looks incomplete > and adding check for the CSS NVM with CSS_CSI looks mixing up things > to me. > > Are you okay with that ? Yeah, we can probably include it in an overall multiple command sets support patch.
diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c index 220edacfccfb..a50b7bcac67a 100644 --- a/drivers/nvme/target/admin-cmd.c +++ b/drivers/nvme/target/admin-cmd.c @@ -175,19 +175,26 @@ static void nvmet_execute_get_log_cmd_effects_ns(struct nvmet_req *req) if (!log) goto out; - log->acs[nvme_admin_get_log_page] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_identify] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_abort_cmd] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_set_features] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_get_features] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_async_event] = cpu_to_le32(1 << 0); - log->acs[nvme_admin_keep_alive] = cpu_to_le32(1 << 0); - - log->iocs[nvme_cmd_read] = cpu_to_le32(1 << 0); - log->iocs[nvme_cmd_write] = cpu_to_le32(1 << 0); - log->iocs[nvme_cmd_flush] = cpu_to_le32(1 << 0); - log->iocs[nvme_cmd_dsm] = cpu_to_le32(1 << 0); - log->iocs[nvme_cmd_write_zeroes] = cpu_to_le32(1 << 0); + switch (req->cmd->get_log_page.csi) { + case NVME_CSI_NVM: + log->acs[nvme_admin_get_log_page] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_identify] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_abort_cmd] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_set_features] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_get_features] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_async_event] = cpu_to_le32(1 << 0); + log->acs[nvme_admin_keep_alive] = cpu_to_le32(1 << 0); + + log->iocs[nvme_cmd_read] = cpu_to_le32(1 << 0); + log->iocs[nvme_cmd_write] = cpu_to_le32(1 << 0); + log->iocs[nvme_cmd_flush] = cpu_to_le32(1 << 0); + log->iocs[nvme_cmd_dsm] = cpu_to_le32(1 << 0); + log->iocs[nvme_cmd_write_zeroes] = cpu_to_le32(1 << 0); + break; + default: + status = NVME_SC_INVALID_LOG_PAGE; + break; + } status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log)); @@ -606,6 +613,7 @@ static u16 nvmet_copy_ns_identifier(struct nvmet_req *req, u8 type, u8 len, static void nvmet_execute_identify_desclist(struct nvmet_req *req) { + u16 nvme_cis_nvm = NVME_CSI_NVM; u16 status = 0; off_t off = 0; @@ -631,6 +639,11 @@ static void nvmet_execute_identify_desclist(struct nvmet_req *req) goto out; } + status = nvmet_copy_ns_identifier(req, NVME_NIDT_CSI, NVME_NIDT_CSI_LEN, + &nvme_cis_nvm, &off); + if (status) + goto out; + if (sg_zero_buffer(req->sg, req->sg_cnt, NVME_IDENTIFY_DATA_SIZE - off, off) != NVME_IDENTIFY_DATA_SIZE - off) status = NVME_SC_INTERNAL | NVME_SC_DNR; diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c index 8ce4d59cc9e7..672e4009f8d6 100644 --- a/drivers/nvme/target/core.c +++ b/drivers/nvme/target/core.c @@ -681,6 +681,7 @@ struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid) uuid_gen(&ns->uuid); ns->buffered_io = false; + ns->csi = NVME_CSI_NVM; return ns; } @@ -1103,6 +1104,16 @@ static inline u8 nvmet_cc_iocqes(u32 cc) return (cc >> NVME_CC_IOCQES_SHIFT) & 0xf; } +static inline bool nvmet_cc_css_check(u8 cc_css) +{ + switch (cc_css <<= NVME_CC_CSS_SHIFT) { + case NVME_CC_CSS_NVM: + return true; + default: + return false; + } +} + static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) { lockdep_assert_held(&ctrl->lock); @@ -1111,7 +1122,7 @@ static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES || nvmet_cc_mps(ctrl->cc) != 0 || nvmet_cc_ams(ctrl->cc) != 0 || - nvmet_cc_css(ctrl->cc) != 0) { + !nvmet_cc_css_check(nvmet_cc_css(ctrl->cc))) { ctrl->csts = NVME_CSTS_CFS; return; } diff --git a/drivers/nvme/target/nvmet.h b/drivers/nvme/target/nvmet.h index 8776dd1a0490..476b3cd91c65 100644 --- a/drivers/nvme/target/nvmet.h +++ b/drivers/nvme/target/nvmet.h @@ -81,6 +81,7 @@ struct nvmet_ns { struct pci_dev *p2p_dev; int pi_type; int metadata_size; + u8 csi; }; static inline struct nvmet_ns *to_nvmet_ns(struct config_item *item)
NVMe TP 4056 allows controller to support different command sets. NVMeoF target currently only supports namespaces that contain traditional logical blocks that may be randomly read and written. In some applications there is value in exposing namespaces that contain logical blocks that have special access rules (e.g. sequentially write required namespace such as Zoned Namespace (ZNS)). In order to support the Zoned Block Devices (ZBD) backend, controller needs to have support for ZNS Command Set Identifier (CSI). In this preparation patch, we adjust the code such that it can now support different command sets. We update the namespace data structure to store the CSI value which defaults to NVME_CSI_NVM which represents traditional logical blocks namespace type. The CSI support is required to implement the ZBD backend over NVMe ZNS interface, since ZNS commands belongs to the different command set than the default one. Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com> --- drivers/nvme/target/admin-cmd.c | 39 ++++++++++++++++++++++----------- drivers/nvme/target/core.c | 13 ++++++++++- drivers/nvme/target/nvmet.h | 1 + 3 files changed, 39 insertions(+), 14 deletions(-)