Message ID | 20200629203904.2989007-1-martin.blumenstingl@googlemail.com (mailing list archive) |
---|---|
Headers | show |
Series | clk: meson8b: add two missing gate clocks | expand |
On Mon 29 Jun 2020 at 22:39, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > While trying to figure out how to set up the video clocks on the 32-bit > SoCs I found that the current clock tree is missing two gates. This adds > the missing gates based on evidence found in the public S805 datasheet, > the GXBB clock driver and 3.10 vendor kernel. > > I didn't add any Fixes tag because this clock tree is still read-only > and the HDMI PLL (the top-most clock in this tree) needs more work as > well. > > > Martin Blumenstingl (2): > clk: meson: meson8b: add the vclk_en gate clock > clk: meson: meson8b: add the vclk2_en gate clock > > drivers/clk/meson/meson8b.c | 60 ++++++++++++++++++++++++++++++------- > drivers/clk/meson/meson8b.h | 4 ++- > 2 files changed, 53 insertions(+), 11 deletions(-) Applied Thx.