From patchwork Wed Mar 30 15:40:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12796036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7019CC433FE for ; Wed, 30 Mar 2022 15:40:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346669AbiC3PmS (ORCPT ); Wed, 30 Mar 2022 11:42:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240274AbiC3PmR (ORCPT ); Wed, 30 Mar 2022 11:42:17 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E5DA933E0A; Wed, 30 Mar 2022 08:40:31 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.90,223,1643641200"; d="scan'208";a="115200171" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 31 Mar 2022 00:40:31 +0900 Received: from localhost.localdomain (unknown [10.226.92.121]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 031EB4009A89; Thu, 31 Mar 2022 00:40:27 +0900 (JST) From: Phil Edworthy To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman Cc: Phil Edworthy , Biju Das , Lad Prabhakar , Chris Paterson , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 00/14] Add new Renesas RZ/V2M SoC and Renesas RZ/V2M EVK support Date: Wed, 30 Mar 2022 16:40:11 +0100 Message-Id: <20220330154024.112270-1-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hello, RZ/V2M has a dual-core Cortex-A53 (1.0 GHz) CPU and built-in AI accelerator "DRP-AI" for vision, which is Renesas' original technology. It also has a 32-bit LPDDR4 interface and video codec (H.264). The RZ/V2M is used with ISP firmware that runs on one of the Cortex-A53 cores. The firmware is an integral part of the SoC such that the HW User's Manual documents which of the peripheral modules are used by the firmware. Initial patches enables minimal peripherals on Renesas RZ/V2M EVK board and booted via nfs. Ethernet is broadly compatible with the etheravb-rcar-gen3 driver, but interrupts need some work so it's not been included in this patch set. Below blocks are enabled on Renesas RZ/V2M EVK board: - memory - External input clock - CPG - UART Links for SoC and EVK: [*] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-a53-lpddr4x32bit-ai-accelerator-isp-4k-video-codec-4k-camera-input-fhd-display-output Sorry for cross posting the patches to multiple subsystems, as these are just the dt-binding patches included as part of initial bringup patches. v2: * Removed SYS dt-bindings patch and corresponding SoC identification as we only used the LSI version register. This can be dealt with later on. * Fixed em-uart dt-bindings. * Included reviewed-by tags. Thanks Phil