| Message ID | 20230323230127.120883-1-aford173@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | clk: imx: Improve imx8mm/imx8mn LCDIF clocks | expand |
On 23-03-23 18:01:23, Adam Ford wrote: > Both the i.MX8M Mini and Nano have a video_pll which can be used > to source a clock which feeds the lcdif interface. This interface > currently fixes video_pll and divides down the clock feeding LCDIF. > However, when connected to an HDMI bridge chip that supports a > variety of video resolutions and refresh rates, the only settings > that properly sync are ones that evenly divide from the video_pll_out > clock. > > This series adds the ability for the clk-compolsite-8m to > request a better parent clock rate if the proper clock flag is > enable and sets that flag in the corresponding imx8mm and > imx8mn video_pll clocks to increase the number of resolutions > and refresh rates timings that the LCDIF can produce. > > This also has a side benefit of allowing the video-pll to run > at a lower clock speed which can potentially save some power > depending on the requested resolution and refresh rate. > Applied, thanks! [1/4] clk: imx: composite-8m: Add support to determine_rate commit: 156e96ff2172518b6f83e97d8f11f677bc668e22 [2/4] clk: imx: Add imx8m_clk_hw_composite_flags macro commit: 784a9b3916e949c00666588fd167c4ab245ec9d6 [3/4] clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate commit: 5fe6ec93f10b0765d59e0efb6ecba419a6a49d48 [4/4] clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate commit: 46a974433ea7fa468b45db70536f7cea81feb87c Best regards, -- Abel Vesa <abel.vesa@linaro.org> > v4: Sorry for the noise. I forgot to 'git ammend' so V4 > is what V3 should have been. > V3: Change the name of clk_divider_determine_rate to > imx8m_clk_divider_determine_rate > V2: Split off the new imx8m_clk_hw_composite_flags definition > into its own patch and re-order to fix build error. > > Adam Ford (3): > clk: imx: composite-8m: Add support to determine_rate > clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate > clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate > > drivers/clk/imx/clk-composite-8m.c | 7 +++++++ > drivers/clk/imx/clk-imx8mm.c | 2 +- > drivers/clk/imx/clk-imx8mn.c | 2 +- > drivers/clk/imx/clk.h | 4 ++++ > 4 files changed, 13 insertions(+), 2 deletions(-) > > -- > 2.34.1 >
Both the i.MX8M Mini and Nano have a video_pll which can be used to source a clock which feeds the lcdif interface. This interface currently fixes video_pll and divides down the clock feeding LCDIF. However, when connected to an HDMI bridge chip that supports a variety of video resolutions and refresh rates, the only settings that properly sync are ones that evenly divide from the video_pll_out clock. This series adds the ability for the clk-compolsite-8m to request a better parent clock rate if the proper clock flag is enable and sets that flag in the corresponding imx8mm and imx8mn video_pll clocks to increase the number of resolutions and refresh rates timings that the LCDIF can produce. This also has a side benefit of allowing the video-pll to run at a lower clock speed which can potentially save some power depending on the requested resolution and refresh rate. v4: Sorry for the noise. I forgot to 'git ammend' so V4 is what V3 should have been. V3: Change the name of clk_divider_determine_rate to imx8m_clk_divider_determine_rate V2: Split off the new imx8m_clk_hw_composite_flags definition into its own patch and re-order to fix build error. Adam Ford (3): clk: imx: composite-8m: Add support to determine_rate clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate drivers/clk/imx/clk-composite-8m.c | 7 +++++++ drivers/clk/imx/clk-imx8mm.c | 2 +- drivers/clk/imx/clk-imx8mn.c | 2 +- drivers/clk/imx/clk.h | 4 ++++ 4 files changed, 13 insertions(+), 2 deletions(-)