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[RESEND,v27,0/3] Introduce Nuvoton Arbel NPCM8XX BMC SoC

Message ID 20240815150255.3996258-1-tmaimon77@gmail.com (mailing list archive)
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Series Introduce Nuvoton Arbel NPCM8XX BMC SoC | expand

Message

Tomer Maimon Aug. 15, 2024, 3:02 p.m. UTC 
This patchset adds clock support for the Nuvoton 
Arbel NPCM8XX Board Management controller (BMC) SoC family.

The NPCM8xx clock controller is created using the auxiliary device framework
and set up in the npcm reset driver since the NPCM8xx clock is using the
same register region.

This patchset cover letter is based from the initial support for NPCM8xx BMC to
keep tracking the version history.

This patchset was tested on the Arbel NPCM8XX evaluation board.

No changes since version 26, only tested in kernel 6.11.rc1

Changes since version 25:
 - Add select AUXILIARY_BUS to npcm_reset kconfig.
 - Include <linux/auxiliary_bus.h> and <linux/slab.h> in reset and clock driver.
 
Changes since version 24:
 - Keep clock npcm8xx dt-binding to avoid ABI break.
 - Fix kfree parameter.
 - Correct reference.
 - Modify commit message.
 
Changes since version 23:
 - NPCM8xx clock controller using the auxiliary device framework.
 - Add NPCM8xx clock controller aux device registration support in npcm reset driver.
 - Remove unused nuvoton,npcm845 clk bindings.
 - Remove all string #define 
 
Changes since version 22:
 - Modify commit message to explain broken ABI in dt-binding
 - Using regmap parenet regmap memory therefore remove use of npcm8xx rst-clock patch.
 - Leave npcm7xx rst node as is
 
Changes since version 21:
 - Since using regmap instead of ioremap replace reg to syscon 
   property in dt-bindings and dts.
 - Add reference clock property to the dt-bindings and dts.
 - Using .index instead of .name in clk_parent_data structures.
 - Using string where any macros are used once.

Changes since version 20:
 - Using regmap instead of ioremap.
   the clock and reset modules are sharing the same memory region 
   and cause failure when using devm_platform_ioremap_resource
   function, this version uses regmap to handle shared 
   reset and clock memory region, in case it is approved I will
   modify the reset driver to use the regmap as well.
 - Using clk_hw instead of clk_parent_data structre.
 - Divider clock definition to one line

Changes since version 19:
 - Remove unnecessary free command.
 - Defining pr_fmt().
 - Using dev_err_probe.
 - Return zero in the end of the probe function.

Changes since version 18:
 - NPCM8XX clock driver did not changed from version 18 only build and tested under kernel 6.6-rc1.

Changes since version 17:
 - NPCM8XX clock driver did not changed from version 17 only build and tested under kernel 6.5-rc3.

Changes since version 16:
 - NPCM8XX clock driver
	- Using devm_kzalloc instead kzalloc.
	- Remove unnecessary parenthesis.
	- Modify incorrect spelling.

Changes since version 15:
 - NPCM8XX clock driver
	- Remove unused regs parameter from npcm8xx_pll_data structure.
	- Using index and clk_hw parameters to set the clock parent in the clock structures.

Changes since version 14:
 - NPCM8XX clock driver
	- Remove unnecessary register definitions.
	- Remove the internal reference clock, instead use the external DT reference clock.
	- rearrange the driver.
	- using .names parameter in DT to define clock (refclk).

Changes since version 13:
 - NPCM8XX clock driver
	- Remove unnecessary definitions and add module.h define
	- Use in clk_parent_data struct.fw_name and .name.
	- Add module_exit function.
	- Add const to divider clock names.
	- Add MODULE_DESCRIPTION and MODULE_LICENSE

Changes since version 12:
 - NPCM8XX clock driver
	- Use clk_parent_data in mux and div clock structure.
	- Add const to mux tables.
	- Using devm_clk_hw_register_fixed_rate function.
	- use only .name clk_parent_data instead .name and .fw_name.
	- Modify mask values in mux clocks. 

Changes since version 11:
 - NPCM8XX clock driver
	- Modify Kconfig help.
	- Modify loop variable to unsigned int.

Changes since version 11:
 - NPCM8XX clock driver
	- Modify Kconfig help.
	- Modify loop variable to unsigned int.

Changes since version 10:
 - NPCM8XX clock driver
	- Fix const warning.

Changes since version 9:
 - NPCM8XX clock driver
	- Move configuration place.
	- Using clk_parent_data instead of parent_name
	- using devm_ioremap instead of ioremap. deeply sorry, I know we had
	 a long discussion on what should the driver use, from other examples 
	 (also in other clock drivers) I see the combination of 
	 platform_get_resource and devm_ioremap are commonly used and it answer
	 the reset and clock needs.

Changes since version 8:
 - NPCM8XX clock driver
	- Move configuration place.
	- Add space before and aftre '{' '}'.
	- Handle devm_of_clk_add_hw_provider function error.

Changes since version 7:
 - NPCM8XX clock driver
	- The clock and reset registers using the same memory region, 
	  due to it the clock driver should claim the ioremap directly 
	  without checking the memory region.

Changes since version 5:
 - NPCM8XX clock driver
	- Remove refclk if devm_of_clk_add_hw_provider function failed.

Changes since version 4:
 - NPCM8XX clock driver
	- Use the same quote in the dt-binding file.

Changes since version 3:
 - NPCM8XX clock driver
	- Rename NPCM8xx clock dt-binding header file.
	- Remove unused structures.
	- Improve Handling the clocks registration.

Changes since version 2:
 - NPCM8XX clock driver
	- Add debug new line.
	- Add 25M fixed rate clock.
	- Remove unused clocks and clock name from dt-binding.

Changes since version 1:
 - NPCM8XX clock driver
	- Modify dt-binding.
	- Remove unsed definition and include.
	- Include alphabetically.
	- Use clock devm.

Tomer Maimon (3):
  dt-bindings: reset: npcm: add clock properties
  reset: npcm: register npcm8xx clock auxiliary bus device
  clk: npcm8xx: add clock controller

 .../bindings/reset/nuvoton,npcm750-reset.yaml |  18 +
 drivers/clk/Kconfig                           |   8 +
 drivers/clk/Makefile                          |   1 +
 drivers/clk/clk-npcm8xx.c                     | 430 ++++++++++++++++++
 drivers/reset/Kconfig                         |   1 +
 drivers/reset/reset-npcm.c                    |  74 ++-
 include/soc/nuvoton/clock-npcm8xx.h           |  16 +
 7 files changed, 547 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/clk-npcm8xx.c
 create mode 100755 include/soc/nuvoton/clock-npcm8xx.h

Comments

Stephen Boyd Aug. 28, 2024, 8:54 p.m. UTC | #1 
Quoting Tomer Maimon (2024-08-15 08:02:52)
> This patchset adds clock support for the Nuvoton 
> Arbel NPCM8XX Board Management controller (BMC) SoC family.
> 
> The NPCM8xx clock controller is created using the auxiliary device framework
> and set up in the npcm reset driver since the NPCM8xx clock is using the
> same register region.
> 
> This patchset cover letter is based from the initial support for NPCM8xx BMC to
> keep tracking the version history.
> 
> This patchset was tested on the Arbel NPCM8XX evaluation board.
> 
> No changes since version 26, only tested in kernel 6.11.rc1

Thanks for working on this! I'm waiting for Philipp to review/ack the
reset driver part. Until then I don't think I can apply this series to
the clk tree. I'll add a review tag to the clk driver patch in case that
helps.
Tomer Maimon Aug. 29, 2024, 8:07 a.m. UTC | #2 
Hi Stephen,

Sure.

Thanks a lot,

Tomer

On Wed, 28 Aug 2024 at 23:54, Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Tomer Maimon (2024-08-15 08:02:52)
> > This patchset adds clock support for the Nuvoton
> > Arbel NPCM8XX Board Management controller (BMC) SoC family.
> >
> > The NPCM8xx clock controller is created using the auxiliary device framework
> > and set up in the npcm reset driver since the NPCM8xx clock is using the
> > same register region.
> >
> > This patchset cover letter is based from the initial support for NPCM8xx BMC to
> > keep tracking the version history.
> >
> > This patchset was tested on the Arbel NPCM8XX evaluation board.
> >
> > No changes since version 26, only tested in kernel 6.11.rc1
>
> Thanks for working on this! I'm waiting for Philipp to review/ack the
> reset driver part. Until then I don't think I can apply this series to
> the clk tree. I'll add a review tag to the clk driver patch in case that
> helps.
Tomer Maimon Sept. 12, 2024, 7:19 p.m. UTC | #3 
Hi Stephen,

Philipp approved the reset patch with the minor changes; these minor
changes are already addressed in V28 that sent few minutes ago.

So the clock patchset could be applied :-)

Appreciate your efforts and guidance.

Best regards,

Tomer

On Thu, 29 Aug 2024 at 11:07, Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> Hi Stephen,
>
> Sure.
>
> Thanks a lot,
>
> Tomer
>
> On Wed, 28 Aug 2024 at 23:54, Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Tomer Maimon (2024-08-15 08:02:52)
> > > This patchset adds clock support for the Nuvoton
> > > Arbel NPCM8XX Board Management controller (BMC) SoC family.
> > >
> > > The NPCM8xx clock controller is created using the auxiliary device framework
> > > and set up in the npcm reset driver since the NPCM8xx clock is using the
> > > same register region.
> > >
> > > This patchset cover letter is based from the initial support for NPCM8xx BMC to
> > > keep tracking the version history.
> > >
> > > This patchset was tested on the Arbel NPCM8XX evaluation board.
> > >
> > > No changes since version 26, only tested in kernel 6.11.rc1
> >
> > Thanks for working on this! I'm waiting for Philipp to review/ack the
> > reset driver part. Until then I don't think I can apply this series to
> > the clk tree. I'll add a review tag to the clk driver patch in case that
> > helps.