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[0/2] clk: renesas: rzv2h-cpg: Add CRU and CSI clocks

Message ID 20241028212914.1057715-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
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Series clk: renesas: rzv2h-cpg: Add CRU and CSI clocks | expand

Message

Lad, Prabhakar Oct. 28, 2024, 9:29 p.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series aims to add CRU/CSI clock and reset entries to the
RZ/V2H(P) clock driver.

1] patch#1:
 Allows exclusion of specific RZ/V2H(P) clocks, such as those in the CRU
 block, from Runtime PM using a new no_pm flag and helper function.
2] patch#2
  Extends the r9a09g057 driver to include PLLVDO, its related CRU clocks
  (CRU0-CRU3), and corresponding reset entries.

Cheers,
Prabhakar

Lad Prabhakar (2):
  clk: renesas: rzv2h-cpg: Add support for clocks without PM
  clk: renesas: r9a09g057-cpg: Add support for PLLVDO, CRU clocks, and
    resets

 drivers/clk/renesas/r9a09g057-cpg.c | 45 +++++++++++++++++++++++++++++
 drivers/clk/renesas/rzv2h-cpg.c     | 37 ++++++++++++++++++++++++
 drivers/clk/renesas/rzv2h-cpg.h     | 18 ++++++++++--
 3 files changed, 97 insertions(+), 3 deletions(-)