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Fri, 21 Feb 2025 09:35:16 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 21 Feb 2025 01:35:12 -0800 From: Taniya Das Subject: [PATCH v5 0/4] Update LPASS Audio clock driver for QCM6490 board Date: Fri, 21 Feb 2025 15:04:53 +0530 Message-ID: <20250221-lpass_qcm6490_resets-v5-0-6be0c0949a83@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAL1IuGcC/3XNywrCMBCF4VcpWRtJcyO68j1ESpNO7YC9JTUop e9uWlwo6PI/MN/MJIBHCOSYzcRDxIB9l0LtMuKasrsCxSo14Ywrxpmmt6EMoRhdq+WBFR4CTIF yJmujNeelciSdDh5qfGzs+ZK6wTD1/rl9iWJd32DOf4NRUEaZzV1thbLCwGm8o8PO7V3fkpWM8 oPh7A8jE6NNZaEyykmjvpllWV5NEyL+AQEAAA== X-Change-ID: 20250206-lpass_qcm6490_resets-204f86622a5c To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio CC: Ajit Pandey , Imran Shaik , Jagadeesh Kona , , , , , Taniya Das , Dmitry Baryshkov X-Mailer: b4 0.15-dev-aa3f6 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6HKIqpWYjgyIfzvrjhmcUUwgxrybwcT4 X-Proofpoint-GUID: 6HKIqpWYjgyIfzvrjhmcUUwgxrybwcT4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-21_01,2025-02-20_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 clxscore=1015 spamscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 impostorscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502210073 This series updates the low pass audio clock controller driver for reset functionality. The patches are split from the below series. https://lore.kernel.org/all/20240318053555.20405-1-quic_tdas@quicinc.com/ The QCM6490 board requires only the reset functionality from the LPASS subsystem. Thus separate out the driver probe to provide the same on the QCM6490 boards. [v5]: Changes in [v5] compared to [v4]: - Update the commit to describe the need for the new qcm6490 compatible. [Krzysztof] - sort the compatibles. [Krzysztof] - Link to v4: https://lore.kernel.org/r/20250220-lpass_qcm6490_resets-v4-0-68dbed85c485@quicinc.com [v4]: Changes in [v4] compared to [v3]: - Update the documentation bindings to keep the clocks, powerdomain constraints. [Krzysztof] - Update the driver to use 'of_device_is_compatible()' instead of 'desc->num_resets' check. [Dmitry] - Link to v3: https://lore.kernel.org/r/20250212-lpass_qcm6490_resets-v3-0-0b1cfb35b38e@quicinc.com [v3]: Changes in [v3] compared to [v2]: - update to Documentation bindings adding constraints. [Krzysztof] - split the DT patch for "Update protected clocks list" for QCM6490 IDP https://lore.kernel.org/linux-devicetree/20250206-protected_clock_qcm6490-v1-1-5923e8c47ab5@quicinc.com/ [v2]: Changes in [v2] compared to [v1]: - Updated the lpass_audio_cc_sc7280 probe to get the match_data for both SC7280 and QCM6490. - Separate regmap for resets [Konrad] - Split the lpassaudiocc compatible and GCC protected clocks list changes. [Dmitry] - Link to V1: https://lore.kernel.org/all/20240531102252.26061-1-quic_tdas@quicinc.com/T/ [v1] - Add a separate platform driver for QCM6490 resets. - Add device tree changes for protected clocks for GCC and LPASS AudioCC compatible update. Signed-off-by: Taniya Das --- Changes in v5: - EDITME: describe what is new in this series revision. - EDITME: use bulletpoints and terse descriptions. - Link to v4: https://lore.kernel.org/r/20250220-lpass_qcm6490_resets-v4-0-68dbed85c485@quicinc.com Changes in v4: - EDITME: describe what is new in this series revision. - EDITME: use bulletpoints and terse descriptions. - Link to v3: https://lore.kernel.org/r/20250212-lpass_qcm6490_resets-v3-0-0b1cfb35b38e@quicinc.com --- Taniya Das (4): dt-bindings: clock: qcom: Add compatible for QCM6490 boards clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490 arm64: dts: qcom: qcm6490-idp: Update the LPASS audio node arm64: dts: qcom: qcs6490-rb3gen2: Update the LPASS audio node .../bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 ++++- arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 5 +++++ arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 +++++ drivers/clk/qcom/lpassaudiocc-sc7280.c | 23 ++++++++++++++++++---- 4 files changed, 33 insertions(+), 5 deletions(-) --- base-commit: 808eb958781e4ebb6e9c0962af2e856767e20f45 change-id: 20250206-lpass_qcm6490_resets-204f86622a5c Best regards,