Show patches with: Submitter = Eugeniy Paltsev       |   10 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[3/3] CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: updates for HSDK clock management - - - --- 2020-03-11 Eugeniy Paltsev Accepted
[2/3] CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: updates for HSDK clock management - - - --- 2020-03-11 Eugeniy Paltsev Accepted
[1/3] CLK: HSDK: CGU: check if PLL is bypassed first CLK: HSDK: CGU: updates for HSDK clock management - - - --- 2020-03-11 Eugeniy Paltsev Accepted
[RESEND] CLK: ARC: Set initial pll output frequency specified in device tree - - - --- 2017-11-14 Eugeniy Paltsev Rejected
CLK: ARC: Set initial pll output frequency specified in device tree - - - --- 2017-09-29 Eugeniy Paltsev Superseded
[v4] ARC: clk: introduce HSDK pll driver - 1 - --- 2017-08-25 Eugeniy Paltsev Accepted
[v3] ARC: clk: introduce HSDKv1 pll driver - - - --- 2017-08-21 Eugeniy Paltsev Superseded
[v2] ARC: clk: introduce HSDKv1 pll driver - - - --- 2017-08-14 Eugeniy Paltsev Superseded
ARC: clk: introduce HSDKv1 pll driver - - - --- 2017-07-14 Eugeniy Paltsev sboyd Superseded
[v4] clk: axs10x: introduce AXS10X pll driver 2 - - --- 2017-06-21 Eugeniy Paltsev sboyd Accepted