Show patches with: Submitter = Yixun Lan       |   99 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,3/3] clk: meson: add sub MMC clock controller driver clk: meson: add a sub EMMC clock controller support - - - --- 2018-08-09 Yixun Lan Changes Requested
[v4,2/3] clk: meson: add DT documentation for emmc clock controller clk: meson: add a sub EMMC clock controller support - 1 - --- 2018-08-09 Yixun Lan Awaiting Upstream
[v4,1/3] clk: meson: add emmc sub clock phase delay driver clk: meson: add a sub EMMC clock controller support - - - --- 2018-08-09 Yixun Lan Changes Requested
clk: meson-axg: pcie: drop the mpll3 clock parent clk: meson-axg: pcie: drop the mpll3 clock parent - - 1 --- 2018-08-01 Yixun Lan Awaiting Upstream
[v3,2/2] clk: meson: add sub MMC clock controller driver - - - --- 2018-07-12 Yixun Lan Changes Requested
[v3,1/2] clk: meson: add DT documentation for emmc clock controller - 1 - --- 2018-07-12 Yixun Lan Awaiting Upstream
[v2,3/3] clk: meson: add sub MMC clock controller driver - - - --- 2018-07-10 Yixun Lan Awaiting Upstream
[v2,2/3] clk: meson: add sub MMC clock dt-bindings IDs - - - --- 2018-07-10 Yixun Lan Changes Requested
[v2,1/3] clk: meson: add DT documentation for emmc clock controller - - - --- 2018-07-10 Yixun Lan Changes Requested
[3/3] clk: meson: add sub EMMC clock controller driver - - - --- 2018-07-03 Yixun Lan Changes Requested
[2/3] clk: meson: add sub EMMC clock dt-bindings IDs - - - --- 2018-07-03 Yixun Lan Changes Requested
[1/3] clk: meson: add DT documentation for emmc clock controller - - - --- 2018-07-03 Yixun Lan Changes Requested
[v2,2/2] clk: meson-axg: add clocks required by pcie driver - - 1 --- 2018-07-02 Yixun Lan Awaiting Upstream
[v2,1/2] clk: meson-axg: add pcie and mipi clock bindings - - 1 --- 2018-07-02 Yixun Lan Awaiting Upstream
clk: meson-axg: add clocks required by pcie driver - - 1 --- 2018-06-21 Yixun Lan Changes Requested
[v8,5/5] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-05-03 Yixun Lan Awaiting Upstream
[v8,4/5] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-05-03 Yixun Lan Awaiting Upstream
[v8,3/5] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 1 1 - --- 2018-05-03 Yixun Lan Awaiting Upstream
[v8,2/5] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-05-03 Yixun Lan Awaiting Upstream
[v8,1/5] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-05-03 Yixun Lan Awaiting Upstream
[v7,7/7] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-04-26 Yixun Lan Superseded
[v7,6/7] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-04-26 Yixun Lan Superseded
[v7,5/7] clk: meson-axg: Add AO Clock and Reset controller driver 1 - - --- 2018-04-26 Yixun Lan Superseded
[v7,4/7] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 1 1 - --- 2018-04-26 Yixun Lan Superseded
[v7,3/7] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-04-26 Yixun Lan Superseded
[v7,2/7] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-04-26 Yixun Lan Superseded
[v7,1/7] clk: meson: migrate to devm_of_clk_add_hw_provider API - - - --- 2018-04-26 Yixun Lan Awaiting Upstream
[v6,7/7] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-04-19 Yixun Lan Superseded
[v6,6/7] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-04-19 Yixun Lan Superseded
[v6,5/7] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-04-19 Yixun Lan Superseded
[v6,4/7] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings - 1 - --- 2018-04-19 Yixun Lan Superseded
[v6,3/7] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-04-19 Yixun Lan Superseded
[v6,2/7] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-04-19 Yixun Lan Superseded
[v6,1/7] clk: meson: migrate to devm_of_clk_add_hw_provider API - - - --- 2018-04-19 Yixun Lan Superseded
[v5,7/7] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-04-09 Yixun Lan Awaiting Upstream
[v5,6/7] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-04-09 Yixun Lan Awaiting Upstream
[v5,5/7] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-04-09 Yixun Lan Changes Requested
[v5,4/7] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 1 1 - --- 2018-04-09 Yixun Lan Awaiting Upstream
[v5,3/7] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-04-09 Yixun Lan Awaiting Upstream
[v5,2/7] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-04-09 Yixun Lan Changes Requested
[v5,1/7] clk: meson: migrate to devm_of_clk_add_hw_provider API - - - --- 2018-04-09 Yixun Lan Awaiting Upstream
[v4,7/7] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-04-08 Yixun Lan Awaiting Upstream
[v4,6/7] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-04-08 Yixun Lan Awaiting Upstream
[v4,5/7] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-04-08 Yixun Lan Changes Requested
[v4,4/7] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings - 1 - --- 2018-04-08 Yixun Lan Awaiting Upstream
[v4,3/7] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-04-08 Yixun Lan Awaiting Upstream
[v4,2/7] clk: meson: migrate to devm_of_clk_add_hw_provider API - - - --- 2018-04-08 Yixun Lan Changes Requested
[v4,1/7] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-04-08 Yixun Lan Changes Requested
[v3,6/6] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-03-28 Yixun Lan Awaiting Upstream
[v3,5/6] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-03-28 Yixun Lan Awaiting Upstream
[v3,4/6] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-03-28 Yixun Lan Changes Requested
[v3,3/6] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings - 1 - --- 2018-03-28 Yixun Lan Awaiting Upstream
[v3,2/6] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-03-28 Yixun Lan Awaiting Upstream
[v3,1/6] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-03-28 Yixun Lan Changes Requested
[3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO - - - --- 2018-03-26 Yixun Lan Not Applicable
[2/3] clk: meson: drop CLK_IGNORE_UNUSED flag - - - --- 2018-03-26 Yixun Lan Changes Requested
[1/3] clk: meson: drop CLK_SET_RATE_PARENT flag - - - --- 2018-03-26 Yixun Lan Changes Requested
[v2,7/7] ARM64: dts: meson-axg: add an 32K alt aoclk 1 - - --- 2018-03-23 Yixun Lan Not Applicable
[v2,6/7] arm64: dts: meson-axg: add AO clock driver DT info - - - --- 2018-03-23 Yixun Lan Not Applicable
[v2,5/7] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-03-23 Yixun Lan Not Applicable
[v2,4/7] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings - 1 - --- 2018-03-23 Yixun Lan Awaiting Upstream
[v2,3/7] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC - 1 - --- 2018-03-23 Yixun Lan Awaiting Upstream
[v2,2/7] clk: meson: aoclk: refactor common code into dedicated file - - - --- 2018-03-23 Yixun Lan Changes Requested
[v2,1/7] clk: meson: drop meson_aoclk_gate_regmap_ops - - - --- 2018-03-23 Yixun Lan Awaiting Upstream
[2/2] clk: meson-axg: Add AO Clock and Reset controller driver - - - --- 2018-02-09 Yixun Lan Changes Requested
[1/2] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings - - - --- 2018-02-09 Yixun Lan Changes Requested
clk: meson: axg: fix the od shift of the sys_pll - - - --- 2018-01-19 Yixun Lan Awaiting Upstream
[v8] arm64: dts: meson-axg: switch uart_ao clock to CLK81 - 1 - --- 2017-12-15 Yixun Lan Not Applicable
[v7,6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81 - - - --- 2017-12-11 Yixun Lan Not Applicable
[v7,5/6] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC 1 - - --- 2017-12-11 Yixun Lan Not Applicable
[v7,4/6] clk: meson-axg: add clock controller drivers 1 - - --- 2017-12-11 Yixun Lan Awaiting Upstream
[v7,3/6] clk: meson-axg: add clocks dt-bindings required header 1 - - --- 2017-12-11 Yixun Lan Awaiting Upstream
[v7,2/6] dt-bindings: clock: add compatible variant for the Meson-AXG 1 - - --- 2017-12-11 Yixun Lan Awaiting Upstream
[v7,1/6] clk: meson: make the spinlock naming more specific - - - --- 2017-12-11 Yixun Lan Awaiting Upstream
[v6,6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81 - - - --- 2017-12-11 Yixun Lan Superseded
[v6,5/6] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC 1 - - --- 2017-12-11 Yixun Lan Superseded
[v6,4/6] clk: meson: make the spinlock naming more specific - - - --- 2017-12-11 Yixun Lan Superseded
[v6,3/6] clk: meson-axg: add clock controller drivers 1 - - --- 2017-12-11 Yixun Lan Superseded
[v6,2/6] clk: meson-axg: add clocks dt-bindings required header 1 - - --- 2017-12-11 Yixun Lan Superseded
[v6,1/6] dt-bindings: clock: add compatible variant for the Meson-AXG 1 - - --- 2017-12-11 Yixun Lan Superseded
[v5,4/4] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC 1 - - --- 2017-12-07 Yixun Lan Superseded
[v5,3/4] clk: meson-axg: add clock controller drivers - - - --- 2017-12-07 Yixun Lan Superseded
[v5,2/4] clk: meson-axg: add clocks dt-bindings required header - - - --- 2017-12-07 Yixun Lan Superseded
[v5,1/4] dt-bindings: clock: add compatible variant for the Meson-AXG 1 - - --- 2017-12-07 Yixun Lan Superseded
clk: meson: make the spinlock naming more specific - - - --- 2017-12-04 Yixun Lan Awaiting Upstream
[v4,4/4] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC 1 - - --- 2017-12-01 Yixun Lan Not Applicable
[v4,3/4] clk: meson-axg: add clock controller drivers 1 - - --- 2017-12-01 Yixun Lan Changes Requested
[v4,2/4] clk: meson-axg: add clocks dt-bindings required header 1 - - --- 2017-12-01 Yixun Lan Changes Requested
[v4,1/4] dt-bindings: clock: add compatible variant for the Meson-AXG 1 - - --- 2017-12-01 Yixun Lan Awaiting Upstream
[v3,3/3] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC - - - --- 2017-11-28 Yixun Lan Changes Requested
[v3,2/3] clk: meson-axg: add clock controller drivers 1 - - --- 2017-11-28 Yixun Lan Changes Requested
[v3,1/3] dt-bindings: clock: add compatible variant for the Meson-AXG 1 - - --- 2017-11-28 Yixun Lan Changes Requested
[v2,2/2] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC - - - --- 2017-11-27 Yixun Lan Changes Requested
[v2,1/2] clk: meson-axg: add clock controller drivers - - - --- 2017-11-27 Yixun Lan Changes Requested
[v4,1/4] clk: meson: gxbb: fix wrong clock for SARADC/SANA - - 1 --- 2017-11-07 Yixun Lan Awaiting Upstream
[v3,1/4] clk: meson: gxbb: fix wrong clock for SARADC/SANA - - 1 --- 2017-11-07 Yixun Lan Changes Requested
clk: meson: gxbb: fix wrong clock for SARADC/SANA - - 1 --- 2017-11-06 Yixun Lan Changes Requested
[1/2] clk: meson-axg: add clock controller drivers - - - --- 2017-11-06 Yixun Lan Awaiting Upstream
clk: meson: gxbb: fix wrong clock for SARADC - - - --- 2017-11-03 Yixun Lan Changes Requested