Show patches with: Submitter = Yang Xiwen via B4 Relay       |   43 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3] clk: set initial best mux parent to current parent with CLK_MUX_ROUND_CLOSEST [v3] clk: set initial best mux parent to current parent with CLK_MUX_ROUND_CLOSEST - - - --- 2024-03-07 Yang Xiwen via B4 Relay Under Review
[v2,2/2] clk: test: use __clk_mux_determine_rate() and remove FIXME clk: fix mux determine rate logic - - - --- 2024-03-05 Yang Xiwen via B4 Relay Superseded
[v2,1/2] clk: set initial best mux parent to current parent when determining rate clk: fix mux determine rate logic - - - --- 2024-03-05 Yang Xiwen via B4 Relay Superseded
[RFC,2/2] clk: hisilicon: add support for PLL clk: hisilicon: add support for PLL - - - --- 2024-02-24 Yang Xiwen via B4 Relay Changes Requested
[RFC,1/2] clk: hisilicon: rename hi3519 PLL registration function clk: hisilicon: add support for PLL - - - --- 2024-02-24 Yang Xiwen via B4 Relay Changes Requested
[RESEND] clk: set initial best mux parent to current parent when determining rate [RESEND] clk: set initial best mux parent to current parent when determining rate - - - --- 2024-02-23 Yang Xiwen via B4 Relay Changes Requested
[v5,6/6] clk: hisilicon: add CRG driver for Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v5,5/6] dt-bindings: clock: hisilicon,hisi-crg: add Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 1 - - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v5,4/6] clk: hisilicon: fix include path for crg-hi3798cv200 clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v5,3/6] arm64: dts: hisilicon: fix include path clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v5,2/6] dt-bindings: clock: histb-clock: split into two header files clk: hisilicon: add support for Hi3798MV200 1 - - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v5,1/6] dt-bindings: clock: convert hisi-crg.txt to YAML clk: hisilicon: add support for Hi3798MV200 - 1 - --- 2024-02-23 Yang Xiwen via B4 Relay Superseded
[v4,7/7] clk: hisilicon: add CRG driver for Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-22 Yang Xiwen via B4 Relay Superseded
[v4,6/7] dt-bindings: clock: hisilicon: add clock definitions for Hi3798MV200 clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-22 Yang Xiwen via B4 Relay Changes Requested
[v4,5/7] dt-bindings: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 1 - - --- 2024-02-22 Yang Xiwen via B4 Relay Changes Requested
[v4,4/7] clk: hisilicon: fix include path for crg-hi3798cv200 clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-22 Yang Xiwen via B4 Relay Superseded
[v4,3/7] arm64: dts: hisilicon: fix include path clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-22 Yang Xiwen via B4 Relay Not Applicable
[v4,2/7] dt-bindings: clock: histb-clock: split into two header files clk: hisilicon: add support for Hi3798MV200 1 - - --- 2024-02-22 Yang Xiwen via B4 Relay Superseded
[v4,1/7] dt-bindings: clock: convert hisi-crg.txt to YAML clk: hisilicon: add support for Hi3798MV200 - 1 - --- 2024-02-22 Yang Xiwen via B4 Relay Superseded
[v3,8/8] clk: hisilicon: add CRG driver for Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Superseded
[v3,7/8] dt-bindings: clock: hisilicon: add clock definitions for Hi3798MV200 clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Changes Requested
[v3,6/8] dt-bindings: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Superseded
[v3,5/8] clk: hisilicon: fix include path for crg-hi3798cv200 clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Superseded
[v3,4/8] arm64: dts: hisilicon: fix include path clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Not Applicable
[v3,3/8] dt-bindings: clock: histb-clock: split into two header files clk: hisilicon: add support for Hi3798MV200 1 - - --- 2024-02-21 Yang Xiwen via B4 Relay Superseded
[v3,2/8] ARM: dts: hisilicon: add missing compatibles to CRG node clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Not Applicable
[v3,1/8] dt-bindings: clock: convert hisi-crg.txt to YAML clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-21 Yang Xiwen via B4 Relay Changes Requested
[RESEND] clk: set initial best mux parent to current parent when determining rate [RESEND] clk: set initial best mux parent to current parent when determining rate - - - --- 2024-02-19 Yang Xiwen via B4 Relay Superseded
[RFC,v2,5/5] dt-bindings: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC support clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-17 Yang Xiwen via B4 Relay Changes Requested
[RFC,v2,4/5] dt-bindings: mfd: syscon: Add hisilicon,sdmmc-sap-dll compatible clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-17 Yang Xiwen via B4 Relay Superseded
[RFC,v2,3/5] dt-bindings: clock: merge all hisilicon clock bindings to hisilicon,clock-reset-genera… clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-17 Yang Xiwen via B4 Relay Changes Requested
[RFC,v2,2/5] clk: hisilicon: add CRG driver for Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-17 Yang Xiwen via B4 Relay Changes Requested
[RFC,v2,1/5] dt-bindings: clock: histb-clock: Add missing common clock and Hi3798MV200 specific clo… clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-17 Yang Xiwen via B4 Relay Changes Requested
[RFC,4/4] dt-binding: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC support clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-16 Yang Xiwen via B4 Relay Superseded
[RFC,3/4] dt-binding: clock: merge all hisilicon clock bindings to hisilicon,clock-reset-generator clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-16 Yang Xiwen via B4 Relay Superseded
[RFC,2/4] clk: hisilicon: add CRG driver for Hi3798MV200 SoC clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-16 Yang Xiwen via B4 Relay Superseded
[RFC,1/4] dt-binding: clock: histb-clock: Add missing common clock and Hi3798MV200 specific clock d… clk: hisilicon: add support for Hi3798MV200 - - - --- 2024-02-16 Yang Xiwen via B4 Relay Changes Requested
clk: set initial best mux parent to current parent when determining rate clk: set initial best mux parent to current parent when determining rate - - - --- 2024-02-15 Yang Xiwen via B4 Relay Superseded
[v3,2/2] clk: tests: Add missing test cases for mux determine_rate clk: fix corner case of clk_mux_determine_rate_flags() - - - --- 2023-04-26 Yang Xiwen via B4 Relay Changes Requested
[v3,1/2] clk: use ULONG_MAX as the initial value for the iteration in clk_mux_determine_rate_flags() clk: fix corner case of clk_mux_determine_rate_flags() - - - --- 2023-04-26 Yang Xiwen via B4 Relay Superseded
[v2,2/2] clk: tests: Add missing test case for mux determine_rate clk: fix corner case of clk_mux_determine_rate_flags() - - - --- 2023-04-25 Yang Xiwen via B4 Relay Changes Requested
[v2,1/2] clk: use ULONG_MAX as the initial value for the iteration in clk_mux_determine_rate_flags() clk: fix corner case of clk_mux_determine_rate_flags() - - - --- 2023-04-25 Yang Xiwen via B4 Relay Superseded
clk: use ULONG_MAX as the initial value for the iteration in clk_mux_determine_rate_flags() clk: use ULONG_MAX as the initial value for the iteration in clk_mux_determine_rate_flags() - - - --- 2023-04-21 Yang Xiwen via B4 Relay Changes Requested