From patchwork Mon May 9 12:31:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 9046011 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: X-Original-To: patchwork-linux-clk@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3CACFBF29F for ; Mon, 9 May 2016 12:32:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1ECFC2012D for ; Mon, 9 May 2016 12:32:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F4A72010B for ; Mon, 9 May 2016 12:32:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751764AbcEIMcT (ORCPT ); Mon, 9 May 2016 08:32:19 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:34781 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751715AbcEIMcT (ORCPT ); Mon, 9 May 2016 08:32:19 -0400 Received: by mail-pa0-f45.google.com with SMTP id r5so74170049pag.1 for ; Mon, 09 May 2016 05:32:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IH6bnK2QrVHGAJ7dJU9c1woDzhUe64Vu/+iNe8nYDpM=; b=HnfQKOuYqTd5wL1FDCBiyrDJ4cmr7xTADFaNQxOHplorgG1TbwZatdcVCgIBLlIxx6 8FJUldcO1tHVyzC0aBp8x+dlsf+hVxwSje8yJ94SzEJSqY1V+7MqseNhOa1aR9TswWsj WPRzDWtZKYZu+lEmzPdKYMNaCCdGS6wJjeAdA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IH6bnK2QrVHGAJ7dJU9c1woDzhUe64Vu/+iNe8nYDpM=; b=OSqbGzO335jeGmNy2cGZjllkHkZNF3IuU9NnamNQ7aMV6lI+Mu9DbT8hGVvEVAgTyl D/OJytEJfKlj2X6ktK7ctCQ1ajkGe+i6khe1xA2Ahmus6YUk0G28P1P8Df1LMCOM2yAW U3rRpR56eIliEiBP6wfPRSxDBKqhdydnXCiJU1NE+hrGbrFjqHWyUGQAz0DykaeX4aTo Hr8a8Oz3CU5VOKoHmhnbC35lskDPIK3BF/rQ4kZJ0cr/yYWJkuC/wfKW+x4QMmqIkwz8 rZAq0gqIpyJl456m929DIh3yXvHk7zxlOFWt3TAAfvQSh+KQBsG1/ts+fgqrxN+z0WVs KyZQ== X-Gm-Message-State: AOPr4FV2j5LaP12u1JHHBdf8cUMutLlGJHify3CWPC26g31YLcphRH2aknAHHZHTvAY96Q== X-Received: by 10.66.148.42 with SMTP id tp10mr50280198pab.159.1462797138249; Mon, 09 May 2016 05:32:18 -0700 (PDT) Received: from icarus.au.ibm.com ([2403:480:11:10:3400:b218:cbe9:48cb]) by smtp.gmail.com with ESMTPSA id i75sm17021382pfj.51.2016.05.09.05.32.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 09 May 2016 05:32:17 -0700 (PDT) From: Joel Stanley To: mturquette@baylibre.com, sboyd@codeaurora.org Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jk@ozlabs.org, benh@kernel.crashing.org, arnd@arndb.de, heiko@sntech.de Subject: [PATCH 2/4] drvers/clk: Support fourth generation Aspeed SoCs Date: Mon, 9 May 2016 22:01:49 +0930 Message-Id: <1462797111-14271-3-git-send-email-joel@jms.id.au> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1462797111-14271-1-git-send-email-joel@jms.id.au> References: <1462797111-14271-1-git-send-email-joel@jms.id.au> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A basic driver to create fixed rate clock devices from strapping registers. The clocks on the ast2400 are derived from an external oscillator and the frequency of this can be derived from the strapping of the processor. The frequency of internal clocks can be derived from other registers in the SCU (System Control Unit). Signed-off-by: Joel Stanley --- drivers/clk/Makefile | 1 + drivers/clk/aspeed/Makefile | 1 + drivers/clk/aspeed/clk-g4.c | 109 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 111 insertions(+) create mode 100644 drivers/clk/aspeed/Makefile create mode 100644 drivers/clk/aspeed/clk-g4.c diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 46869d696e4d..8eaaef013a28 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -84,3 +84,4 @@ obj-$(CONFIG_X86) += x86/ obj-$(CONFIG_ARCH_ZX) += zte/ obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_H8300) += h8300/ +obj-$(CONFIG_ARCH_ASPEED) += aspeed/ diff --git a/drivers/clk/aspeed/Makefile b/drivers/clk/aspeed/Makefile new file mode 100644 index 000000000000..d3457fbe3019 --- /dev/null +++ b/drivers/clk/aspeed/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_MACH_ASPEED_G4) += clk-g4.o diff --git a/drivers/clk/aspeed/clk-g4.c b/drivers/clk/aspeed/clk-g4.c new file mode 100644 index 000000000000..91677e9177f5 --- /dev/null +++ b/drivers/clk/aspeed/clk-g4.c @@ -0,0 +1,109 @@ +/* + * Copyright 2016 IBM Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + +static void __init aspeed_of_hpll_clk_init(struct device_node *node) +{ + struct clk *clk, *clkin_clk; + void __iomem *base; + int reg, rate, clkin; + const char *name = node->name; + const char *parent_name; + const int rates[][4] = { + {384, 360, 336, 408}, + {400, 375, 350, 425}, + }; + + of_property_read_string(node, "clock-output-names", &name); + parent_name = of_clk_get_parent_name(node, 0); + + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + reg = readl(base); + iounmap(base); + + clkin_clk = of_clk_get(node, 0); + if (IS_ERR(clkin_clk)) { + pr_err("%s: of_clk_get failed\n", node->full_name); + return; + } + + clkin = clk_get_rate(clkin_clk); + + reg = (reg >> 8) & 0x2; + + if (clkin == 48000000 || clkin == 24000000) + rate = rates[0][reg] * 1000000; + else if (clkin == 25000000) + rate = rates[1][reg] * 1000000; + else { + pr_err("%s: unknown clkin frequency %dHz\n", + node->full_name, clkin); + WARN_ON(1); + } + + clk = clk_register_fixed_rate(NULL, name, parent_name, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_hpll_clock, "aspeed,g4-hpll-clock", + aspeed_of_hpll_clk_init); + +static void __init aspeed_of_apb_clk_init(struct device_node *node) +{ + struct clk *clk, *hpll_clk; + void __iomem *base; + int reg, rate; + const char *name = node->name; + const char *parent_name; + + of_property_read_string(node, "clock-output-names", &name); + parent_name = of_clk_get_parent_name(node, 0); + + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + reg = readl(base); + iounmap(base); + + hpll_clk = of_clk_get(node, 0); + if (IS_ERR(hpll_clk)) { + pr_err("%s: of_clk_get failed\n", node->full_name); + return; + } + + reg = (reg >> 23) & 0x3; + rate = clk_get_rate(hpll_clk) / (2 + 2 * reg); + + clk = clk_register_fixed_rate(NULL, name, parent_name, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_apb_clock, "aspeed,g4-apb-clock", + aspeed_of_apb_clk_init);