From patchwork Mon May 9 12:31:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 9046031 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: X-Original-To: patchwork-linux-clk@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C1C2FBF29F for ; Mon, 9 May 2016 12:32:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF6B62010B for ; Mon, 9 May 2016 12:32:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01C6920107 for ; Mon, 9 May 2016 12:32:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752838AbcEIMcf (ORCPT ); Mon, 9 May 2016 08:32:35 -0400 Received: from mail-pf0-f172.google.com ([209.85.192.172]:34990 "EHLO mail-pf0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752836AbcEIMce (ORCPT ); Mon, 9 May 2016 08:32:34 -0400 Received: by mail-pf0-f172.google.com with SMTP id 77so75539489pfv.2 for ; Mon, 09 May 2016 05:32:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IBm4wWvTs7S3jZElvo0AzL8a5iBpIYvlqvncFWqAX2w=; b=K+jEI/cxtOe8sgJ/w0nRHF93GjAqeeivuPTnzP1XGJIx+y4MhIeoGafuCGaVYnXtSV +NbFTTUYFNIhSMNhWQRLPGvmIUHrhZsIbyHgUNWvpf1oRJjVeRfS2fBn4bysAkg4mcT3 VI9wOE7F6VdUfhTq+j0bukisESix8u8Laavig= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IBm4wWvTs7S3jZElvo0AzL8a5iBpIYvlqvncFWqAX2w=; b=I2zouH0YAlmy3ixkbTPsUsQZLaD+Epf22UyjSIaSn3V5zdewLNPcolBynlK+8SoL4u uvg+gISCEBHu7uBmNowDbIPVi+t0aSYjgdlDAflohDSkJeu2NjGJHcERP3koGl9ksmCY p84fdrfWrML8nM2WLAWhyaTkPoRZ80OUj8B+X5PyUvrxomn8e/W6NH/62v6FR0bwyZDa EQTxGrw5oZm5G0KsWxR3ceIo3sW+R4MhXhtLBbLCDKGwvhEvNUZWSFFnIb+4bpA6ZDEc KaRPeGUP4zAhgQdPYF9l+8XkqFeIOLBfGu+HOGBPhQE/rH1LNTQPqiF3d6MKesUr83i7 riTg== X-Gm-Message-State: AOPr4FWz8SwBQASWmPuvlEqO7psDwp9ETp9A3nyCeE8AQAeIsWjMopIeziiQZFXWLk5VXg== X-Received: by 10.98.52.68 with SMTP id b65mr18593256pfa.24.1462797148549; Mon, 09 May 2016 05:32:28 -0700 (PDT) Received: from icarus.au.ibm.com ([2403:480:11:10:3400:b218:cbe9:48cb]) by smtp.gmail.com with ESMTPSA id i75sm17021382pfj.51.2016.05.09.05.32.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 09 May 2016 05:32:28 -0700 (PDT) From: Joel Stanley To: mturquette@baylibre.com, sboyd@codeaurora.org Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jk@ozlabs.org, benh@kernel.crashing.org, arnd@arndb.de, heiko@sntech.de Subject: [PATCH 4/4] drivers/clk: Support Aspeed UART clock divisor Date: Mon, 9 May 2016 22:01:51 +0930 Message-Id: <1462797111-14271-5-git-send-email-joel@jms.id.au> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1462797111-14271-1-git-send-email-joel@jms.id.au> References: <1462797111-14271-1-git-send-email-joel@jms.id.au> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Aspeed BMC SoCs have UART IP that derive their clocks from a 24MHz reference. It's not clear where this reference comes from, so it is hard coded in the driver. This clock may be divided down by 13 if a certain register is set. This driver reads this register and creates a struct clk for the UARTs to consume. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/Makefile | 1 + drivers/clk/aspeed/clk-uart.c | 52 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 drivers/clk/aspeed/clk-uart.c diff --git a/drivers/clk/aspeed/Makefile b/drivers/clk/aspeed/Makefile index 9ddb0f8f4356..9d5754c086eb 100644 --- a/drivers/clk/aspeed/Makefile +++ b/drivers/clk/aspeed/Makefile @@ -1,2 +1,3 @@ +obj-y += clk-uart.o obj-$(CONFIG_MACH_ASPEED_G4) += clk-g4.o obj-$(CONFIG_MACH_ASPEED_G5) += clk-g5.o diff --git a/drivers/clk/aspeed/clk-uart.c b/drivers/clk/aspeed/clk-uart.c new file mode 100644 index 000000000000..8cd23a758887 --- /dev/null +++ b/drivers/clk/aspeed/clk-uart.c @@ -0,0 +1,52 @@ +/* + * Copyright 2016 IBM Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + +static void __init aspeed_of_uart_clk_init(struct device_node *node) +{ + struct clk *clk; + void __iomem *base; + int reg, rate; + const char *name = node->name; + + of_property_read_string(node, "clock-output-names", &name); + + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + reg = readl(base); + iounmap(base); + + /* + * The documentation does not indicate where this 24MHz clock is + * derived from. + */ + rate = 24000000; + + if (reg & BIT(12)) + rate /= 13; + + clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_uart_clock, "aspeed,uart-clock", + aspeed_of_uart_clk_init);