From patchwork Wed May 25 22:24:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rhyland Klein X-Patchwork-Id: 9136293 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 84BF9607D9 for ; Wed, 25 May 2016 22:26:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 75E12279C4 for ; Wed, 25 May 2016 22:26:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6AAE3282F4; Wed, 25 May 2016 22:26:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A74B282F4 for ; Wed, 25 May 2016 22:26:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752717AbcEYW0B (ORCPT ); Wed, 25 May 2016 18:26:01 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:15192 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752484AbcEYWZK (ORCPT ); Wed, 25 May 2016 18:25:10 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 25 May 2016 15:25:11 -0700 Received: from HQMAIL104.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 25 May 2016 15:23:33 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 25 May 2016 15:23:33 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 25 May 2016 22:25:09 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Wed, 25 May 2016 22:25:09 +0000 Received: from rklein-work.nvidia.com (Not Verified[10.2.71.219]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Wed, 25 May 2016 15:25:09 -0700 From: Rhyland Klein To: Peter De Schrijver , Thierry Reding CC: Michael Turquette , Stephen Boyd , Alexandre Courbot , , , , Stephen Warren , Rhyland Klein Subject: [PATCH 11/11] clk: tegra: WARN if clk in the init_table has enable Date: Wed, 25 May 2016 18:24:31 -0400 Message-ID: <1464215071-28696-12-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464215071-28696-1-git-send-email-rklein@nvidia.com> References: <1464215071-28696-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enabling clocks through the init_table mechanism is deprecated. Clocks that need to be enabled early and stay on should be marked as CRITICAL. Signed-off-by: Rhyland Klein --- drivers/clk/tegra/clk.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index b2cdd9a235f4..898fe922c742 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -262,6 +262,11 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, WARN_ON(1); } + /* Using the init_table to enable clks at boot is + * deprecated. Clks that need to be enabled through early + * boot, they should be marked as CLK_IS_CRITICAL + */ + WARN_ON_ONCE(tbl->state); if (tbl->state) if (clk_prepare_enable(clk)) { pr_err("%s: Failed to enable %s\n", __func__,