From patchwork Mon May 30 14:32:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 9141577 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0956360777 for ; Mon, 30 May 2016 14:34:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F0E9228185 for ; Mon, 30 May 2016 14:34:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E59E72819E; Mon, 30 May 2016 14:34:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A199428185 for ; Mon, 30 May 2016 14:34:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161218AbcE3OdW (ORCPT ); Mon, 30 May 2016 10:33:22 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48556 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754653AbcE3OdU (ORCPT ); Mon, 30 May 2016 10:33:20 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 73F44612EA; Mon, 30 May 2016 14:33:19 +0000 (UTC) Received: from chewinlnx07.qualcomm.com (unknown [202.46.23.62]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 2D32760871; Mon, 30 May 2016 14:33:11 +0000 (UTC) From: Abhishek Sahu To: andy.gross@linaro.org, david.brown@linaro.org, sboyd@codeaurora.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk Cc: mturquette@baylibre.com, galak@codeaurora.org, pradeepb@codeaurora.org, mmcclint@codeaurora.org, varada@codeaurora.org, sricharan@codeaurora.org, architt@codeaurora.org, ntelkar@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Abhishek Sahu Subject: [PATCH 1/5] clk: qcom: ipq4019: Modified the fixed clock rate to proper values Date: Mon, 30 May 2016 20:02:34 +0530 Message-Id: <1464618758-20965-2-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464618758-20965-1-git-send-email-absahu@codeaurora.org> References: <1464618758-20965-1-git-send-email-absahu@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Modified the fixed clock rate initialization in the IPQ4019 clock probe function with correct values. Also some of the fixed clocks entries were not added in the current driver file so added the same. Signed-off-by: Abhishek Sahu --- drivers/clk/qcom/gcc-ipq4019.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c index 3cd1af0..db24cb8 100644 --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c @@ -80,7 +80,7 @@ static struct parent_map gcc_xo_sdcc1_500_map[] = { static const char * const gcc_xo_sdcc1_500[] = { "xo", - "ddrpll", + "ddrpllsdcc", "fepll500", }; @@ -1317,13 +1317,15 @@ static int gcc_ipq4019_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000); - clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000); - clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000); - clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000); + clk_register_fixed_rate(dev, "fepll125", "xo", 0, 125000000); + clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 125000000); + clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 250000000); + clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 250000000); clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000); - clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000); + clk_register_fixed_rate(dev, "fepll500", "xo", 0, 500000000); clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000); + clk_register_fixed_rate(dev, "ddrpllsdcc", "xo", 0, 193000000); + clk_register_fixed_rate(dev, "pcnoc_clk_src", "xo", 0, 100000000); return qcom_cc_probe(pdev, &gcc_ipq4019_desc); }