From patchwork Mon Jun 13 19:04:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 9173971 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E35186086B for ; Mon, 13 Jun 2016 19:06:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7C0D265B9 for ; Mon, 13 Jun 2016 19:06:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CCB0127BE5; Mon, 13 Jun 2016 19:06:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=2.0 tests=BAYES_00,FSL_HELO_HOME, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6720D265B9 for ; Mon, 13 Jun 2016 19:06:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423290AbcFMTGg (ORCPT ); Mon, 13 Jun 2016 15:06:36 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:35575 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1424175AbcFMTGf (ORCPT ); Mon, 13 Jun 2016 15:06:35 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u5DJ6CGM022394; Mon, 13 Jun 2016 14:06:12 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ6CPP020519; Mon, 13 Jun 2016 14:06:12 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Jun 2016 14:06:11 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ56TA004255; Mon, 13 Jun 2016 14:06:09 -0500 From: Tero Kristo To: , , , , CC: Subject: [RESEND PATCHv2 22/28] dt-bindings: clk: ti: Document module clock type Date: Mon, 13 Jun 2016 22:04:56 +0300 Message-ID: <1465844702-12200-23-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465844702-12200-1-git-send-email-t-kristo@ti.com> References: <1465844702-12200-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the new TI module clock type, which is intended to replace the internal clock control handling within omap_hwmod. Module clock is effectively a gate clock controlling both interface and functional clocks for a single hardware IP block. Signed-off-by: Tero Kristo --- .../devicetree/bindings/clock/ti/module.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ti/module.txt diff --git a/Documentation/devicetree/bindings/clock/ti/module.txt b/Documentation/devicetree/bindings/clock/ti/module.txt new file mode 100644 index 0000000..0329667 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/module.txt @@ -0,0 +1,59 @@ +Binding for Texas Instruments module clock. + +Binding status: Unstable - ABI compatibility may be broken in the future + +This binding uses the common clock binding[1]. This clock is +quite much similar to the basic gate-clock [2], however, internally +it controls an OMAP module clock, which effectively handles +both interface and functional clocks for a single module. In some +cases, support for mux clock [3] is composited to the same clock node, +currently only needed for proper support of timer module clocks. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/clock/ti/gate.txt +[3] Documentation/devicetree/bindings/clock/ti/mux.txt + +Required properties: +- compatible : shall be one of: + "ti,omap4-mod-clock" - basic module clock, no gating supported + "ti,omap4-hw-mod-clock" - module clock with hardware gating support + "ti,omap4-sw-mod-clock" - module clock with software forced gating support + "ti,omap4-sw-no-idlest-mod-clock" - module clock with software forced gating + support, misses idlest + "ti,omap4-mux-mod-clock" - composite clock with mux and module clocks, no + gating supported + "ti,omap4-hw-mux-mod-clock" - composite clock with mux and module clocks, + with hardware gating + "ti,omap4-sw-mux-mod-clock" - composite clock with mux and module clocks, + with software forced gating + +- #clock-cells : from common clock binding; shall be set to 0 +- clocks : link to phandle of parent clock(s) +- reg : offset for register controlling adjustable gate and optional mux + +Optional properties: +- ti,bit-shift : bit shift for programming the clock mux, only needed for + the nodes of the mux variant + +Examples: + timer6_mod_ck: timer6_mod_ck { + #clock-cells = <0>; + compatible = "ti,omap4-sw-mux-mod-clock"; + reg = <0x0570>; + clocks = <&syc_clk_div_ck>, <&sys_32k_ck>; + ti,bit-shift = <24>; + }; + + i2c1_mod_ck: i2c1_mod_ck { + #clock-cells = <0>; + compatible = "ti,omap4-sw-mod-clock"; + reg = <0x14a0>; + clocks = <&func_96m_fclk>; + }; + + hsi_mod_ck: hsi_mod_ck { + #clock-cells = <0>; + compatible = "ti,omap4-hw-mod-clock"; + reg = <0x1338>; + clocks = <&hsi_fck>; + };