From patchwork Wed Jun 15 14:13:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 9178649 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3D553608A2 for ; Wed, 15 Jun 2016 14:29:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E06C27D4A for ; Wed, 15 Jun 2016 14:29:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 230F927DCE; Wed, 15 Jun 2016 14:29:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 82D3427E5A for ; Wed, 15 Jun 2016 14:29:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161058AbcFOO1X (ORCPT ); Wed, 15 Jun 2016 10:27:23 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:7171 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932832AbcFOO1T (ORCPT ); Wed, 15 Jun 2016 10:27:19 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Wed, 15 Jun 2016 07:26:47 -0700 Received: from HQMAIL106.nvidia.com ([172.18.146.12]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 15 Jun 2016 07:24:37 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 15 Jun 2016 07:24:37 -0700 Received: from BGMAIL103.nvidia.com (10.25.59.12) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 15 Jun 2016 14:27:17 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by bgmail103.nvidia.com (10.25.59.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 15 Jun 2016 14:27:13 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Wed, 15 Jun 2016 14:27:09 +0000 From: Laxman Dewangan To: , , , , CC: , , , , , Laxman Dewangan , Javier Martinez Canillas Subject: [PATCH 3/5] clk: max77686: Add DT binding details for PMIC MAX77620 Date: Wed, 15 Jun 2016 19:43:36 +0530 Message-ID: <1466000018-16784-4-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1466000018-16784-1-git-send-email-ldewangan@nvidia.com> References: <1466000018-16784-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Maxim has used the same clock IP on multiple PMICs like MAX77686, MAX77802, MAX77620. Only differences are the number of clocks from these PMICs. Add clock binding details and example for the max77620 in maxim,max77686. Signed-off-by: Laxman Dewangan CC: Krzysztof Kozlowski CC: Javier Martinez Canillas --- .../devicetree/bindings/clock/maxim,max77686.txt | 38 +++++++++++++++++++--- include/dt-bindings/mfd/max77620.h | 4 +++ 2 files changed, 38 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/maxim,max77686.txt b/Documentation/devicetree/bindings/clock/maxim,max77686.txt index 354e5ab..24deb19 100644 --- a/Documentation/devicetree/bindings/clock/maxim,max77686.txt +++ b/Documentation/devicetree/bindings/clock/maxim,max77686.txt @@ -1,8 +1,11 @@ -Binding for Maxim MAX77686/MAX77802 32k clock generator block +Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block -This is a part of device tree bindings of MAX77686/MAX77802 multi-function -device. More information can be found in bindings/mfd/max77686.txt file for -MAX77686 and bindings/mfd/max77802.txt for MAX77802. +This is a part of device tree bindings of MAX77686/MAX77802/MAX77620 +multi-function device. More information can be found in MFD DT binding +doc as follows: + bindings/mfd/max77686.txt for MAX77686 and + bindings/mfd/max77802.txt for MAX77802 and + bindings/mfd/max77620.txt for MAX77620. The MAX77686 contains three 32.768khz clock outputs that can be controlled (gated/ungated) over I2C. @@ -10,6 +13,9 @@ The MAX77686 contains three 32.768khz clock outputs that can be controlled The MAX77802 contains two 32.768khz clock outputs that can be controlled (gated/ungated) over I2C. +The MAX77686 contains one 32.768khz clock outputs that can be controlled +(gated/ungated) over I2C. + Following properties should be presend in main device node of the MFD chip. Required properties: @@ -82,3 +88,27 @@ Example: clock-names = "my-clock"; clocks = <&max77802 MAX77802_CLK_32K_AP>; }; + + +3. With MAX77620: + +#include +::: + + Node of the MFD chip + max77620: max77620@3c { + compatible = "maxim,max77620"; + reg = <0x3c>; + ::: + #clock-cells = <1>; + ::: + }; + + Clock consumer node + + foo@0 { + compatible = "bar,foo"; + /* ... */ + clock-names = "my-clock"; + clocks = <&max77620 MAX77620_CLK_32K_OUT0>; + }; diff --git a/include/dt-bindings/mfd/max77620.h b/include/dt-bindings/mfd/max77620.h index b911a07..e1bd08c 100644 --- a/include/dt-bindings/mfd/max77620.h +++ b/include/dt-bindings/mfd/max77620.h @@ -36,4 +36,8 @@ #define MAX77620_FPS_SRC_NONE 3 #define MAX77620_FPS_SRC_DEF 4 +/* MAX77686 clocks */ +#define MAX77620_CLKS_NUM 1 +#define MAX77620_CLK_32K_OUT0 0 + #endif