From patchwork Fri Jun 17 10:51:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 9183469 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1EE616075F for ; Fri, 17 Jun 2016 11:06:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DF2D2838B for ; Fri, 17 Jun 2016 11:06:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 027FE283AB; Fri, 17 Jun 2016 11:06:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E1FC42838B for ; Fri, 17 Jun 2016 11:06:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755516AbcFQLFl (ORCPT ); Fri, 17 Jun 2016 07:05:41 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:12673 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbcFQLFj (ORCPT ); Fri, 17 Jun 2016 07:05:39 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Fri, 17 Jun 2016 04:05:19 -0700 Received: from HQHUB102.nvidia.com ([172.20.187.25]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 17 Jun 2016 04:01:59 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 17 Jun 2016 04:01:59 -0700 Received: from BGMAIL101.nvidia.com (10.25.59.10) by HQHUB102.nvidia.com (172.20.187.25) with Microsoft SMTP Server (TLS) id 8.3.406.0; Fri, 17 Jun 2016 04:05:37 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by bgmail101.nvidia.com (10.25.59.10) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Fri, 17 Jun 2016 11:05:33 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Fri, 17 Jun 2016 11:05:30 +0000 From: Laxman Dewangan To: , , CC: , , , Laxman Dewangan , Krzysztof Kozlowski , Javier Martinez Canillas Subject: [PATCH V3 3/4] clk: max77686: Add DT binding details for PMIC MAX77620 Date: Fri, 17 Jun 2016 16:21:06 +0530 Message-ID: <1466160667-28451-4-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1466160667-28451-1-git-send-email-ldewangan@nvidia.com> References: <1466160667-28451-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Maxim has used the same clock IP on multiple PMICs like MAX77686, MAX77802, MAX77620. Only differences are the number of clocks from these PMICs like MAX77686 has 3 clocks output, MAX776802 have two clock output and MAX77620 has one clock output. Add clock binding details and DT example for the MAX77620. Signed-off-by: Laxman Dewangan CC: Krzysztof Kozlowski CC: Javier Martinez Canillas Reviewed-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski --- Changes from V1: - Use proper comment for the :::: - Added dt binding preprocessor file as maxim,max77620.h for max77620 inline with the other chip. - Refer the dt binding header for the supported clock index. Changes from V2: - Collected RBs. --- .../devicetree/bindings/clock/maxim,max77686.txt | 52 +++++++++++++++++----- include/dt-bindings/clock/maxim,max77620.h | 21 +++++++++ 2 files changed, 63 insertions(+), 10 deletions(-) create mode 100644 include/dt-bindings/clock/maxim,max77620.h diff --git a/Documentation/devicetree/bindings/clock/maxim,max77686.txt b/Documentation/devicetree/bindings/clock/maxim,max77686.txt index 4d973b5..8398a3a 100644 --- a/Documentation/devicetree/bindings/clock/maxim,max77686.txt +++ b/Documentation/devicetree/bindings/clock/maxim,max77686.txt @@ -1,14 +1,24 @@ -Binding for Maxim MAX77686/MAX77802 32k clock generator block +Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block -This is a part of device tree bindings of MAX77686/MAX77802 multi-function -device. More information can be found in bindings/mfd/max77686.txt file for -MAX77686 and bindings/mfd/max77802.txt for MAX77802. +This is a part of device tree bindings of MAX77686/MAX77802/MAX77620 +multi-function device. More information can be found in MFD DT binding +doc as follows: + bindings/mfd/max77686.txt for MAX77686 and + bindings/mfd/max77802.txt for MAX77802 and + bindings/mfd/max77620.txt for MAX77620. The MAX77686 contains three 32.768khz clock outputs that can be controlled -(gated/ungated) over I2C. +(gated/ungated) over I2C. Clocks are defined as preprocessor macros in +dt-bindings/clock/maxim,max77686.h. + The MAX77802 contains two 32.768khz clock outputs that can be controlled -(gated/ungated) over I2C. +(gated/ungated) over I2C. Clocks are defined as preprocessor macros in +dt-bindings/clock/maxim,max77802.h. + +The MAX77686 contains one 32.768khz clock outputs that can be controlled +(gated/ungated) over I2C. Clocks are defined as preprocessor macros in +dt-bindings/clock/maxim,max77620.h. Following properties should be presend in main device node of the MFD chip. @@ -21,13 +31,12 @@ Optional properties: Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. Following indices are allowed: - - 0: 32khz_ap clock (max77686, max77802), + - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620) - 1: 32khz_cp clock (max77686, max77802), - 2: 32khz_pmic clock (max77686). -Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max77686.h -header for MAX77686 and dt-bindings/clock/maxim,max77802.h for MAX77802 and can -be used in device tree sources. +Clocks are defined as preprocessor macros in above dt-binding header for +respective chips. Example: @@ -80,3 +89,26 @@ Example: clock-names = "my-clock"; clocks = <&max77802 MAX77802_CLK_32K_AP>; }; + + +3. With MAX77620: + +#include +/* ... */ + + Node of the MFD chip + max77620: max77620@3c { + compatible = "maxim,max77620"; + reg = <0x3c>; + #clock-cells = <1>; + /* ... */ + }; + + Clock consumer node + + foo@0 { + compatible = "bar,foo"; + /* ... */ + clock-names = "my-clock"; + clocks = <&max77620 MAX77620_CLK_32K_OUT0>; + }; diff --git a/include/dt-bindings/clock/maxim,max77620.h b/include/dt-bindings/clock/maxim,max77620.h new file mode 100644 index 0000000..82aba28 --- /dev/null +++ b/include/dt-bindings/clock/maxim,max77620.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clocks for the Maxim 77620 PMIC. + */ + +#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H +#define _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H + +/* Fixed rate clocks. */ + +#define MAX77620_CLK_32K_OUT0 0 + +/* Total number of clocks. */ +#define MAX77620_CLKS_NUM (MAX77620_CLK_32K_OUT0 + 1) + +#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H */