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Thu, 30 Jun 2016 16:15:15 +0900 (KST) From: Andi Shyti To: Chanwoo Choi Cc: Jaehoon Chung , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andi Shyti , Andi Shyti Subject: [PATCH v3 1/2] clk: exynos5433: do not use CLK_IGNORE_UNUSED for SPI clocks Date: Thu, 30 Jun 2016 16:15:10 +0900 Message-id: <1467270911-10971-2-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 In-reply-to: <1467270911-10971-1-git-send-email-andi.shyti@samsung.com> References: <1467270911-10971-1-git-send-email-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeLIzCtJLcpLzFFi42JZI2JSqMt8vCTcYNVNS4vtR56xWiz+8ZzJ 4vqX56wWN361sVq8fmFo0f/4NbPFpsfXWC0+9txjtbi8aw6bxYzz+5gsLp5ytTj8pp3V4seZ bhaLVbv+MDrweby/0crucbmvl8nj+pJPzB47Z91l99i0qpPNY/OSeo++LasYPT5vkgvgiOKy SUnNySxLLdK3S+DKWP3yN0tBM2/FsalbWRsYF3F3MXJySAiYSHS9uskEYYtJXLi3ng3EFhJY wSjx6C8zTM3La/9Zuhi5gOKzGCWW939lg3A+Mkqc7LrFAlLFJqAp0XT7B1i3iICGxMy/VxhB bGaBT8wSH/t8uhg5OIQFwiT+HtcECbMIqErMXTwZrJxXwE1i39JNjBDL5CQuT38AFucUcJf4 P/sT1EFuEmc2tLCC7JUQuMcucXr9NXaIQQIS3yYfYgGZLyEgK7HpANTRkhIHV9xgmcAovICR YRWjaGpBckFxUnqRsV5xYm5xaV66XnJ+7iZGYAyd/vesfwfj3QPWhxgFOBiVeHgneJaEC7Em lhVX5h5iNAXaMJFZSjQ5HxipeSXxhsZmRhamJqbGRuaWZkrivAulfgYLCaQnlqRmp6YWpBbF F5XmpBYfYmTi4JRqYMzzkN909Bjb7VNzwoM4Z/4TO/3w5BE3/2nh/7u+7pg3QfmHQ1Dwh5BE 5duRExhZM8On67n1V4ru78iUX37fVOpT+4LVwr8Ta2eHL7Bdf23u+8TZzz3MvB4KP/zB6Sbo nMjN/H3aj88l/Y89L/94+CKITavmRef07nOSnNnxncpr93sc3ba75pcSS3FGoqEWc1FxIgBT dOwTnAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOIsWRmVeSWpSXmKPExsVy+t9jQV3m4yXhBjc7TSy2H3nGarH4x3Mm i+tfnrNa3PjVxmrx+oWhRf/j18wWmx5fY7X42HOP1eLyrjlsFjPO72OyuHjK1eLwm3ZWix9n ulksVu36w+jA5/H+Riu7x+W+XiaP60s+MXvsnHWX3WPTqk42j81L6j36tqxi9Pi8SS6AI6qB 0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6GwlhbLE nFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bql79ZCpp5K45N3crawLiIu4uR k0NCwETi5bX/LBC2mMSFe+vZuhi5OIQEZjFKLO//CuV8ZJQ42XULrIpNQFOi6fYPNhBbREBD YubfK4wgNrPAJ2aJj30+XYwcHMICYRJ/j2uChFkEVCXmLp4MVs4r4Caxb+kmRohlchKXpz8A i3MKuEv8n/0JzBYCqjmzoYV1AiPvAkaGVYwSqQXJBcVJ6blGeanlesWJucWleel6yfm5mxjB kfpMegfj4V3uhxgFOBiVeHgP7CsJF2JNLCuuzD3EKMHBrCTCu/EgUIg3JbGyKrUoP76oNCe1 +BCjKdBhE5mlRJPzgUkkryTe0NjEzMjSyNzQwsjYXEmc9/H/dWFCAumJJanZqakFqUUwfUwc nFINjPmsL97tu/X05KVV+tZG4V8qSjUlXkk6r+M48zr1+PK7i/eILjv5sLniUcVa+5WzJjlI nv0wpazV0JS9YfUMtm/K+3kOlmVIzCxrzvWRFOxsELs+raLAICpondOMJLVjTzPDrZd8Wek2 qawra2Ls96pFS+UkQy3/BLJpTL/G2jSDMfXHztSMUiWW4oxEQy3mouJEAEuKbuXqAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The CLK_IGNORE_UNUSED flag has to be avoided whenever possible. Use the CLK_IS_CRITICAL flag instead for critical SPI1 clocks, which enables the clock line during boot time. Suggested-by: Tomasz Figa Signed-off-by: Andi Shyti --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index c3a5318..1f7c4951 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1662,7 +1662,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in", ENABLE_SCLK_PERIC, 12, - CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in", ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk", @@ -1677,7 +1677,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC, 5, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC, - 4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), + 4, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",