diff mbox

[1/3] clk: versatile add DT bindings for the ICST CM variants

Message ID 1470820172-12840-1-git-send-email-linus.walleij@linaro.org (mailing list archive)
State Superseded, archived
Delegated to: Stephen Boyd
Headers show

Commit Message

Linus Walleij Aug. 10, 2016, 9:09 a.m. UTC
The Integrator/AP and Integrator/CP core modules have special
versions of the ICST525 interface hardcoding some bits. Create
special compatible strings to identify these variants, also
explain a bit what is going on.

Cc: devicetree@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 .../devicetree/bindings/clock/arm-syscon-icst.txt  | 35 ++++++++++++++++++++--
 1 file changed, 33 insertions(+), 2 deletions(-)

Comments

Rob Herring (Arm) Aug. 12, 2016, 6:20 p.m. UTC | #1
On Wed, Aug 10, 2016 at 11:09:32AM +0200, Linus Walleij wrote:
> The Integrator/AP and Integrator/CP core modules have special
> versions of the ICST525 interface hardcoding some bits. Create
> special compatible strings to identify these variants, also
> explain a bit what is going on.
> 
> Cc: devicetree@vger.kernel.org
> Cc: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  .../devicetree/bindings/clock/arm-syscon-icst.txt  | 35 ++++++++++++++++++++--
>  1 file changed, 33 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
> index 8b7177cecb36..48886490591a 100644
> --- a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
> +++ b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
> @@ -5,20 +5,51 @@ Technology (IDT). ARM integrated these oscillators deeply into their
>  reference designs by adding special control registers that manage such
>  oscillators to their system controllers.
>  
> -The ARM system controller contains logic to serialize and initialize
> +The ARM system controllers contains logic to serialize and initialize

s/contains/contain/

>  an ICST clock request after a write to the 32 bit register at an offset
>  into the system controller. Furthermore, to even be able to alter one of
>  these frequencies, the system controller must first be unlocked by
>  writing a special token to another offset in the system controller.
>  
> +The ARM Integrator/AP and Integrator/CP core modules and baseboard contain
> +special versions of the serial interface that only connects the low 8 bits
> +of the VDW (missing one bit), hardwires RDW to different values and sometimes
> +als hardwire the output divider. They therefore have special compatible

s/als/also/

I don't see what is special here. Different h/w is supposed to have 
different compatible strings. I'd word this more, so that you don't have 
to change it again if another compatible string is added.

> +strings as per this table (the OD value is the value on the pins, not the
> +resulting output divider):
> +
> +Integrator variant:      RDW     OD          VDW
> +
> +Integrator/AP            22      1           Bit 8 0, rest variable
> +integratorap-cm
> +
> +Integrator/AP            46      3           Bit 8 0, rest variable
> +integratorap-sys
> +
> +Integrator/AP            22 or   1           17 or (33 or 25 MHz)
> +integratorap-pci         14      1           14
> +
> +Integrator/CP            22      variable    Bit 8 0, rest variable
> +integratorcp-cm-core
> +
> +Integrator/CP            22      variable    Bit 8 0, rest variable
> +integratorcp-cm-mem
> +
>  The ICST oscillator must be provided inside a system controller node.
>  
>  Required properties:
> +- compatible: must be one of
> +  "arm,syscon-icst525"
> +  "arm,syscon-icst307"
> +  "arm,syscon-icst525-integratorap-cm"
> +  "arm,syscon-icst525-integratorap-sys"
> +  "arm,syscon-icst525-integratorap-pci"
> +  "arm,syscon-icst525-integratorcp-cm-core"
> +  "arm,syscon-icst525-integratorcp-cm-mem"
>  - lock-offset: the offset address into the system controller where the
>    unlocking register is located
>  - vco-offset: the offset address into the system controller where the
>    ICST control register is located (even 32 bit address)
> -- compatible: must be one of "arm,syscon-icst525" or "arm,syscon-icst307"
>  - #clock-cells: must be <0>
>  - clocks: parent clock, since the ICST needs a parent clock to derive its
>    frequency from, this attribute is compulsory.
> -- 
> 2.7.4
> 
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Linus Walleij Aug. 22, 2016, 9:05 a.m. UTC | #2
On Fri, Aug 12, 2016 at 8:20 PM, Rob Herring <robh@kernel.org> wrote:

[Fixed spelling mistakes]

>> +The ARM Integrator/AP and Integrator/CP core modules and baseboard contain
>> +special versions of the serial interface that only connects the low 8 bits
>> +of the VDW (missing one bit), hardwires RDW to different values and sometimes
>> +als hardwire the output divider. They therefore have special compatible
>
> s/als/also/
>
> I don't see what is special here. Different h/w is supposed to have
> different compatible strings. I'd word this more, so that you don't have
> to change it again if another compatible string is added.

OK I'll try to come up with something to that effect, the reason it was
not like that from the beginning is my universe is expanding and step
by step gaining knowledge of how this thing has been used by ARM.

I'll try to write something generic about hardwired divisor lines and
compatible strings telling how they are wired.

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
index 8b7177cecb36..48886490591a 100644
--- a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
+++ b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
@@ -5,20 +5,51 @@  Technology (IDT). ARM integrated these oscillators deeply into their
 reference designs by adding special control registers that manage such
 oscillators to their system controllers.
 
-The ARM system controller contains logic to serialize and initialize
+The ARM system controllers contains logic to serialize and initialize
 an ICST clock request after a write to the 32 bit register at an offset
 into the system controller. Furthermore, to even be able to alter one of
 these frequencies, the system controller must first be unlocked by
 writing a special token to another offset in the system controller.
 
+The ARM Integrator/AP and Integrator/CP core modules and baseboard contain
+special versions of the serial interface that only connects the low 8 bits
+of the VDW (missing one bit), hardwires RDW to different values and sometimes
+als hardwire the output divider. They therefore have special compatible
+strings as per this table (the OD value is the value on the pins, not the
+resulting output divider):
+
+Integrator variant:      RDW     OD          VDW
+
+Integrator/AP            22      1           Bit 8 0, rest variable
+integratorap-cm
+
+Integrator/AP            46      3           Bit 8 0, rest variable
+integratorap-sys
+
+Integrator/AP            22 or   1           17 or (33 or 25 MHz)
+integratorap-pci         14      1           14
+
+Integrator/CP            22      variable    Bit 8 0, rest variable
+integratorcp-cm-core
+
+Integrator/CP            22      variable    Bit 8 0, rest variable
+integratorcp-cm-mem
+
 The ICST oscillator must be provided inside a system controller node.
 
 Required properties:
+- compatible: must be one of
+  "arm,syscon-icst525"
+  "arm,syscon-icst307"
+  "arm,syscon-icst525-integratorap-cm"
+  "arm,syscon-icst525-integratorap-sys"
+  "arm,syscon-icst525-integratorap-pci"
+  "arm,syscon-icst525-integratorcp-cm-core"
+  "arm,syscon-icst525-integratorcp-cm-mem"
 - lock-offset: the offset address into the system controller where the
   unlocking register is located
 - vco-offset: the offset address into the system controller where the
   ICST control register is located (even 32 bit address)
-- compatible: must be one of "arm,syscon-icst525" or "arm,syscon-icst307"
 - #clock-cells: must be <0>
 - clocks: parent clock, since the ICST needs a parent clock to derive its
   frequency from, this attribute is compulsory.