From patchwork Tue Aug 23 15:52:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: hotran X-Patchwork-Id: 9295899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0A75860B16 for ; Tue, 23 Aug 2016 15:54:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F05D220649 for ; Tue, 23 Aug 2016 15:54:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3A4926253; Tue, 23 Aug 2016 15:54:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E738720649 for ; Tue, 23 Aug 2016 15:54:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753776AbcHWPxv (ORCPT ); Tue, 23 Aug 2016 11:53:51 -0400 Received: from mail-pf0-f174.google.com ([209.85.192.174]:34320 "EHLO mail-pf0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753562AbcHWPxn (ORCPT ); Tue, 23 Aug 2016 11:53:43 -0400 Received: by mail-pf0-f174.google.com with SMTP id p64so44990974pfb.1 for ; Tue, 23 Aug 2016 08:53:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GOi1ejFK/C3Y99iEyq1u4zHZgE/NjDlj8Mvun9iA1YI=; b=MdtWXVoYSqb65Lsx9sudyJZa37BqunQcvXeoYzEGlveYPLIm4d+Wer/Uzwmo6MHvzV jgIJjEF9XbvpLjn3mJSg5EvkbuVGZtNHn5oFgsbWuDHKaaFqPyWzQZg8085rJhoYzExZ qV5Da89d3FfNu0pOjgfyRBoocpoH1/FtdesPQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GOi1ejFK/C3Y99iEyq1u4zHZgE/NjDlj8Mvun9iA1YI=; b=aAmwVt9skU20dKo1VPubRJ/Lf37sy3uG5AASly/BBrpgbVxy62ACKG+6IuAwrI6y8r I2fEkGcGQ4IYzc/qhtK0TcRZnSmIO8UWw7KijMZ/+DuE322W5puKMLVLWrEuE+q0XY2P UEbXtXtW/HiF9G/Q1gnPQBf/fYRwqkITlPmDu78SiBeJVjVvy4647homjIS3ESkC6LIq ETCrg/v3U4or7rXrofVDZfMeudGaNDG77Yy1h0A+9pytaPvwbrufW7os9tF7b8EkuqUF HP+ndT2he/TVszPwzHBWKcCnE8FyezOAmAgnjXMn8TlY5fvTkuh0nsaVF3dTWDvcmoXg Lo1w== X-Gm-Message-State: AEkoousfirWmrlTj5/s2AgJlhj+d8Ku6crtA/eoW+aqRk5ahctoNbg47zNXUqOyskaX3E6Xr X-Received: by 10.98.87.138 with SMTP id i10mr54412868pfj.16.1471967618788; Tue, 23 Aug 2016 08:53:38 -0700 (PDT) Received: from hotran_localhost.amcc.com ([206.80.4.98]) by smtp.gmail.com with ESMTPSA id s89sm6765178pfi.83.2016.08.23.08.53.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Aug 2016 08:53:38 -0700 (PDT) From: Hoan Tran To: Michael Turquette , Rob Herring , Stephen Boyd , Mark Rutland Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lho@apm.com, Duc Dang , Hoan Tran Subject: [PATCH 3/3] arm64: dts: xgene: Add DT node for APM X-Gene 2 CPU clocks Date: Tue, 23 Aug 2016 08:52:41 -0700 Message-Id: <1471967561-23634-4-git-send-email-hotran@apm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471967561-23634-1-git-send-email-hotran@apm.com> References: <1471967561-23634-1-git-send-email-hotran@apm.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add DT nodes to enable APM X-Gene 2 CPU clocks. Signed-off-by: Hoan Tran --- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 64 ++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index 1425ed4..e656e16 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -26,6 +26,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; + #clock-cells = <1>; + clocks = <&pmd0clk 0>; }; cpu@001 { device_type = "cpu"; @@ -34,6 +36,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; + #clock-cells = <1>; + clocks = <&pmd0clk 0>; }; cpu@100 { device_type = "cpu"; @@ -42,6 +46,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_1>; + #clock-cells = <1>; + clocks = <&pmd1clk 0>; }; cpu@101 { device_type = "cpu"; @@ -50,6 +56,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_1>; + #clock-cells = <1>; + clocks = <&pmd1clk 0>; }; cpu@200 { device_type = "cpu"; @@ -58,6 +66,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_2>; + #clock-cells = <1>; + clocks = <&pmd2clk 0>; }; cpu@201 { device_type = "cpu"; @@ -66,6 +76,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_2>; + #clock-cells = <1>; + clocks = <&pmd2clk 0>; }; cpu@300 { device_type = "cpu"; @@ -74,6 +86,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_3>; + #clock-cells = <1>; + clocks = <&pmd3clk 0>; }; cpu@301 { device_type = "cpu"; @@ -82,6 +96,8 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_3>; + #clock-cells = <1>; + clocks = <&pmd3clk 0>; }; xgene_L2_0: l2-cache-0 { compatible = "cache"; @@ -223,6 +239,54 @@ clock-output-names = "refclk"; }; + pmdpll: pmdpll@170000f0 { + compatible = "apm,xgene-pcppll-v2-clock"; + #clock-cells = <1>; + clocks = <&refclk 0>; + reg = <0x0 0x170000f0 0x0 0x10>; + clock-output-names = "pmdpll"; + }; + + pmd0clk: pmd0clk { + compatible = "apm,xgene-pmd-clock"; + #clock-cells = <1>; + clocks = <&pmdpll 0>; + reg = <0x0 0x7E200200 0x0 0x10>; + clock-shift = <8>; + clock-width = <3>; + clock-output-names = "pmd0clk"; + }; + + pmd1clk: pmd1clk { + compatible = "apm,xgene-pmd-clock"; + #clock-cells = <1>; + clocks = <&pmdpll 0>; + reg = <0x0 0x7E200210 0x0 0x10>; + clock-shift = <8>; + clock-width = <3>; + clock-output-names = "pmd1clk"; + }; + + pmd2clk: pmd2clk { + compatible = "apm,xgene-pmd-clock"; + #clock-cells = <1>; + clocks = <&pmdpll 0>; + reg = <0x0 0x7E200220 0x0 0x10>; + clock-shift = <8>; + clock-width = <3>; + clock-output-names = "pmd2clk"; + }; + + pmd3clk: pmd3clk { + compatible = "apm,xgene-pmd-clock"; + #clock-cells = <1>; + clocks = <&pmdpll 0>; + reg = <0x0 0x7E200230 0x0 0x10>; + clock-shift = <8>; + clock-width = <3>; + clock-output-names = "pmd3clk"; + }; + socpll: socpll@17000120 { compatible = "apm,xgene-socpll-v2-clock"; #clock-cells = <1>;