From patchwork Thu Sep 15 04:45:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 9332809 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EFA06601C2 for ; Thu, 15 Sep 2016 04:46:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D0F1529182 for ; Thu, 15 Sep 2016 04:46:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C0D432918B; Thu, 15 Sep 2016 04:46:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5307329182 for ; Thu, 15 Sep 2016 04:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755236AbcIOEp7 (ORCPT ); Thu, 15 Sep 2016 00:45:59 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:37619 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751041AbcIOEp6 (ORCPT ); Thu, 15 Sep 2016 00:45:58 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9B1AD61B0E; Thu, 15 Sep 2016 04:45:57 +0000 (UTC) Received: from blr-ubuntu-41.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: vivek.gautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D3BC461AD5; Thu, 15 Sep 2016 04:45:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org D3BC461AD5 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=vivek.gautam@codeaurora.org From: vivek.gautam@codeaurora.org To: sboyd@codeaurora.org Cc: andy.gross@linaro.org, david.brown@linaro.org, mturquette@baylibre.com, srinivas.kandagatla@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Vivek Gautam Subject: [PATCH] clk: Add USB3 PHY reset lines Date: Thu, 15 Sep 2016 10:15:33 +0530 Message-Id: <1473914733-4182-1-git-send-email-vivek.gautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vivek Gautam Adding missing reset lines for USB 3.0 PHY. Signed-off-by: Vivek Gautam --- - Build tested on clk-next branch. - Tested with my wip branch for usbphy that is available @[1]. [1]https://github.com/vivekgautam1/linux/tree/linaro/integration-linux-qcomlt-usbphy-wip drivers/clk/qcom/gcc-msm8996.c | 2 ++ include/dt-bindings/clock/qcom,gcc-msm8996.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c index ebe5d18..fe03e6f 100644 --- a/drivers/clk/qcom/gcc-msm8996.c +++ b/drivers/clk/qcom/gcc-msm8996.c @@ -3329,6 +3329,8 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = { [GCC_USB_20_BCR] = { 0x12000 }, [GCC_QUSB2PHY_PRIM_BCR] = { 0x12038 }, [GCC_QUSB2PHY_SEC_BCR] = { 0x1203c }, + [GCC_USB3_PHY_BCR] = { 0x50020 }, + [GCC_USB3PHY_PHY_BCR] = { 0x50024 }, [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, [GCC_SDCC1_BCR] = { 0x13000 }, [GCC_SDCC2_BCR] = { 0x14000 }, diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h index b7ea1e8..1828723 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8996.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h @@ -337,6 +337,8 @@ #define GCC_QREFS_VBG_CAL_BCR 100 #define GCC_PCIE_PHY_COM_BCR 101 #define GCC_PCIE_PHY_COM_NOCSR_BCR 102 +#define GCC_USB3_PHY_BCR 103 +#define GCC_USB3PHY_PHY_BCR 104 /* Indexes for GDSCs */