Message ID | 1474441040-11946-2-git-send-email-yangbo.lu@nxp.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show
Return-Path: <linux-clk-owner@kernel.org> Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B5019607D0 for <patchwork-linux-clk@patchwork.kernel.org>; Wed, 21 Sep 2016 07:09:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9ED1A2A121 for <patchwork-linux-clk@patchwork.kernel.org>; Wed, 21 Sep 2016 07:09:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 930B72A137; Wed, 21 Sep 2016 07:09:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E36722A121 for <patchwork-linux-clk@patchwork.kernel.org>; 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Wed, 21 Sep 2016 07:09:35 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com; nxp.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11OLC002.mail.protection.outlook.com (10.173.161.186) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.629.5 via Frontend Transport; Wed, 21 Sep 2016 07:09:35 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id u8L79HVk027711; Wed, 21 Sep 2016 00:09:28 -0700 From: Yangbo Lu <yangbo.lu@nxp.com> To: <linux-mmc@vger.kernel.org>, <ulf.hansson@linaro.org>, Scott Wood <oss@buserror.net>, Arnd Bergmann <arnd@arndb.de> CC: <linuxppc-dev@lists.ozlabs.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <iommu@lists.linux-foundation.org>, <netdev@vger.kernel.org>, Mark Rutland <mark.rutland@arm.com>, Rob Herring <robh+dt@kernel.org>, Russell King <linux@arm.linux.org.uk>, Jochen Friedrich <jochen@scram.de>, Joerg Roedel <joro@8bytes.org>, Claudiu Manoil <claudiu.manoil@freescale.com>, "Bhupesh Sharma" <bhupesh.sharma@freescale.com>, Qiang Zhao <qiang.zhao@nxp.com>, "Kumar Gala" <galak@codeaurora.org>, Santosh Shilimkar <ssantosh@kernel.org>, Leo Li <leoyang.li@nxp.com>, Xiaobo Xie <xiaobo.xie@nxp.com>, Minghuan Lian <minghuan.lian@nxp.com>, Yangbo Lu <yangbo.lu@nxp.com> Subject: [v12, 1/8] dt: bindings: update Freescale DCFG compatible Date: Wed, 21 Sep 2016 14:57:13 +0800 Message-ID: <1474441040-11946-2-git-send-email-yangbo.lu@nxp.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1474441040-11946-1-git-send-email-yangbo.lu@nxp.com> References: <1474441040-11946-1-git-send-email-yangbo.lu@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131189153758390588; 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diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index dbbc095..713c1ae 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -119,7 +119,11 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: should be "fsl,<chip>-dcfg" + Possible compatibles: + "fsl,ls1021a-dcfg" + "fsl,ls1043a-dcfg" + "fsl,ls2080a-dcfg" - reg : should contain base address and length of DCFG memory-mapped registers Example: