From patchwork Wed Sep 21 12:21:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 9343409 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 522A4607D4 for ; Wed, 21 Sep 2016 12:24:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 436F02A60C for ; Wed, 21 Sep 2016 12:24:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37C032A60F; Wed, 21 Sep 2016 12:24:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C7C222A60C for ; Wed, 21 Sep 2016 12:24:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756359AbcIUMXi (ORCPT ); Wed, 21 Sep 2016 08:23:38 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45974 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756537AbcIUMXe (ORCPT ); Wed, 21 Sep 2016 08:23:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 47D4F61726; Wed, 21 Sep 2016 12:23:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1474460613; bh=7yE2lASlXlpIYSv2WOpQ3Bg3n/CJioyKb440CzpIUNw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H7rVIIjGxVWe6qV3H2oxtTxPBEa0TwYYzUh3xuqZRtdv3Q4RaOYf4k+BXmZY2ZmRU Vh6bfb5YVwCjx+/jtvXKvogGZDvKP6RbFNwEG1FKvBAyDBuysMae2Pa1jlmcnusqcF 3oc0NxV/nKOwFdgo6smbcynMYBM+IQxqbfqcsyS4= Received: from chen-lnxbld15.qualcomm.com (unknown [202.46.23.62]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B936E6173B; Wed, 21 Sep 2016 12:23:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1474460612; bh=7yE2lASlXlpIYSv2WOpQ3Bg3n/CJioyKb440CzpIUNw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EBffgTr6QVih3498DYS5ZqDv0Xs5Jth4SfAdOkVqIzEzr+bBEa5UwMNZhPgSSUjwV 3P2FiYANmT10PAfPYeT87Bb4Ujmth6I3gEwEYgFq58/zPIbWCozRLoWo+8lFpHwa4j j5tucnb/gK+ArOOgwZxUuSl8WngAoYos4LVtAZDg= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org B936E6173B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: andy.gross@linaro.org, david.brown@linaro.org, sboyd@codeaurora.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk Cc: mturquette@baylibre.com, galak@codeaurora.org, pradeepb@codeaurora.org, mmcclint@codeaurora.org, varada@codeaurora.org, sricharan@codeaurora.org, architt@codeaurora.org, ntelkar@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Abhishek Sahu Subject: [PATCH v3 6/7] clk: qcom: ipq4019: changed the frequency value for ddr pll Date: Wed, 21 Sep 2016 17:51:51 +0530 Message-Id: <1474460512-31994-7-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1474460512-31994-1-git-send-email-absahu@codeaurora.org> References: <1474460512-31994-1-git-send-email-absahu@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The feedback divider for DDR PLL has been changed in IPQ4019 bootloader from 111 to 112 so changed the frequency values for the same. Signed-off-by: Abhishek Sahu --- drivers/clk/qcom/gcc-ipq4019.c | 52 +++++++++++++++++++++--------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c index b2decd5..a2809db 100644 --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c @@ -546,7 +546,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = { F(25000000, P_FEPLL500, 1, 1, 20), F(50000000, P_FEPLL500, 1, 1, 10), F(100000000, P_FEPLL500, 1, 1, 5), - F(190000000, P_DDRPLL, 1, 0, 0), + F(192000000, P_DDRPLL, 1, 0, 0), { } }; @@ -567,18 +567,18 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { static const struct freq_tbl ftbl_gcc_apps_clk[] = { F(48000000, P_XO, 1, 0, 0), F(200000000, P_FEPLL200, 1, 0, 0), - F(380000000, P_DDRPLLAPSS, 1, 0, 0), - F(409000000, P_DDRPLLAPSS, 1, 0, 0), - F(444000000, P_DDRPLLAPSS, 1, 0, 0), - F(484000000, P_DDRPLLAPSS, 1, 0, 0), + F(384000000, P_DDRPLLAPSS, 1, 0, 0), + F(413000000, P_DDRPLLAPSS, 1, 0, 0), + F(448000000, P_DDRPLLAPSS, 1, 0, 0), + F(488000000, P_DDRPLLAPSS, 1, 0, 0), F(500000000, P_FEPLL500, 1, 0, 0), - F(507000000, P_DDRPLLAPSS, 1, 0, 0), - F(532000000, P_DDRPLLAPSS, 1, 0, 0), - F(560000000, P_DDRPLLAPSS, 1, 0, 0), - F(592000000, P_DDRPLLAPSS, 1, 0, 0), - F(626000000, P_DDRPLLAPSS, 1, 0, 0), - F(666000000, P_DDRPLLAPSS, 1, 0, 0), - F(710000000, P_DDRPLLAPSS, 1, 0, 0), + F(512000000, P_DDRPLLAPSS, 1, 0, 0), + F(537000000, P_DDRPLLAPSS, 1, 0, 0), + F(565000000, P_DDRPLLAPSS, 1, 0, 0), + F(597000000, P_DDRPLLAPSS, 1, 0, 0), + F(632000000, P_DDRPLLAPSS, 1, 0, 0), + F(672000000, P_DDRPLLAPSS, 1, 0, 0), + F(716000000, P_DDRPLLAPSS, 1, 0, 0), { } }; @@ -1381,20 +1381,20 @@ static const struct clk_ops clk_regmap_cpu_div_ops = { }; static const struct freq_tbl ftbl_apps_ddr_pll[] = { - { 380000000, P_XO, 0xd, 0, 0 }, - { 409000000, P_XO, 0xc, 0, 0 }, - { 444000000, P_XO, 0xb, 0, 0 }, - { 484000000, P_XO, 0xa, 0, 0 }, - { 507000000, P_XO, 0x9, 0, 0 }, - { 532000000, P_XO, 0x8, 0, 0 }, - { 560000000, P_XO, 0x7, 0, 0 }, - { 592000000, P_XO, 0x6, 0, 0 }, - { 626000000, P_XO, 0x5, 0, 0 }, - { 666000000, P_XO, 0x4, 0, 0 }, - { 710000000, P_XO, 0x3, 0, 0 }, - { 761000000, P_XO, 0x2, 0, 0 }, - { 819000000, P_XO, 0x1, 0, 0 }, - { 888000000, P_XO, 0x0, 0, 0 }, + { 384000000, P_XO, 0xd, 0, 0 }, + { 413000000, P_XO, 0xc, 0, 0 }, + { 448000000, P_XO, 0xb, 0, 0 }, + { 488000000, P_XO, 0xa, 0, 0 }, + { 512000000, P_XO, 0x9, 0, 0 }, + { 537000000, P_XO, 0x8, 0, 0 }, + { 565000000, P_XO, 0x7, 0, 0 }, + { 597000000, P_XO, 0x6, 0, 0 }, + { 632000000, P_XO, 0x5, 0, 0 }, + { 672000000, P_XO, 0x4, 0, 0 }, + { 716000000, P_XO, 0x3, 0, 0 }, + { 768000000, P_XO, 0x2, 0, 0 }, + { 823000000, P_XO, 0x1, 0, 0 }, + { 896000000, P_XO, 0x0, 0, 0 }, { } };