From patchwork Thu Sep 29 08:35:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 9355889 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 78A916086A for ; Thu, 29 Sep 2016 08:37:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6AE532990C for ; Thu, 29 Sep 2016 08:37:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F77F2990F; Thu, 29 Sep 2016 08:37:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DEFAA2990D for ; Thu, 29 Sep 2016 08:37:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755473AbcI2IhF (ORCPT ); Thu, 29 Sep 2016 04:37:05 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:56617 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755423AbcI2Ige (ORCPT ); Thu, 29 Sep 2016 04:36:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CAE6461AD2; Thu, 29 Sep 2016 08:36:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1475138193; bh=BqFMwgMI+jCGgJPWs6TG4AqjnFEGcHCoskqElC+kmiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VKh42yskPRIM1VR3Fy2HwegQLc8W0bBBjtyH4QS7V6y0FmcWcNjUQFOWt+60OHFl0 6v9vMBgf3gn3mzl41Dok8u9dp58RaopM5r+IC37dYr6NmgNAYzUQ4HoOg+ewij46mp ZP+ok72aUNO0W/FiHMxgpRVM+mkz0od2MzOMAOfo= Received: from blr-ubuntu-34.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9B94161154; Thu, 29 Sep 2016 08:36:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1475138193; bh=BqFMwgMI+jCGgJPWs6TG4AqjnFEGcHCoskqElC+kmiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VKh42yskPRIM1VR3Fy2HwegQLc8W0bBBjtyH4QS7V6y0FmcWcNjUQFOWt+60OHFl0 6v9vMBgf3gn3mzl41Dok8u9dp58RaopM5r+IC37dYr6NmgNAYzUQ4HoOg+ewij46mp ZP+ok72aUNO0W/FiHMxgpRVM+mkz0od2MzOMAOfo= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 9B94161154 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: sboyd@codeaurora.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, tdas@codeaurora.org, Rajendra Nayak Subject: [PATCH v3 06/11] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update Date: Thu, 29 Sep 2016 14:05:47 +0530 Message-Id: <1475138152-859-7-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1475138152-859-1-git-send-email-rnayak@codeaurora.org> References: <1475138152-859-1-git-send-email-rnayak@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Alpha PLLs which do not support dynamic update feature need to be explicitly disabled before a rate change. The ones which do support dynamic update do so within a single vco range, so add a min/max freq check for such PLLs so they fall in the vco range. Signed-off-by: Taniya Das Signed-off-by: Rajendra Nayak --- drivers/clk/qcom/clk-alpha-pll.c | 49 +++++++++++++++++++++++++++++++++------- drivers/clk/qcom/clk-alpha-pll.h | 3 +++ 2 files changed, 44 insertions(+), 8 deletions(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 89c7fdb..6f90a86 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -382,16 +382,41 @@ clk_alpha_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) static int clk_alpha_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long prate) { + bool enabled; struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); const struct pll_vco *vco; u32 l, off = pll->offset; u64 a; rate = alpha_pll_round_rate(rate, prate, &l, &a); - vco = alpha_pll_find_vco(pll, rate); - if (!vco) { - pr_err("alpha pll not in a valid vco range\n"); - return -EINVAL; + enabled = clk_hw_is_enabled(hw); + + if (pll->flags & SUPPORTS_DYNAMIC_UPDATE) { + /* + * PLLs which support dynamic updates support one single + * vco range, between min_rate and max_rate supported + */ + if (rate < pll->min_rate || rate > pll->max_rate) { + pr_err("alpha pll rate outside supported min/max range\n"); + return -EINVAL; + } + } else { + /* + * All alpha PLLs which do not support dynamic update, + * should be disabled before a vco update. + */ + if (enabled) + hw->init->ops->disable(hw); + + vco = alpha_pll_find_vco(pll, rate); + if (!vco) { + pr_err("alpha pll not in a valid vco range\n"); + return -EINVAL; + } + + regmap_update_bits(pll->clkr.regmap, off + PLL_USER_CTL, + PLL_VCO_MASK << PLL_VCO_SHIFT, + vco->val << PLL_VCO_SHIFT); } regmap_write(pll->clkr.regmap, off + PLL_L_VAL, l); @@ -404,13 +429,12 @@ static int clk_alpha_pll_set_rate(struct clk_hw *hw, unsigned long rate, regmap_write(pll->clkr.regmap, off + PLL_ALPHA_VAL_U, a >> 32); } - regmap_update_bits(pll->clkr.regmap, off + PLL_USER_CTL, - PLL_VCO_MASK << PLL_VCO_SHIFT, - vco->val << PLL_VCO_SHIFT); - regmap_update_bits(pll->clkr.regmap, off + PLL_USER_CTL, PLL_ALPHA_EN, PLL_ALPHA_EN); + if (!(pll->flags & SUPPORTS_DYNAMIC_UPDATE) && enabled) + hw->init->ops->enable(hw); + return 0; } @@ -423,6 +447,15 @@ static long clk_alpha_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long min_freq, max_freq; rate = alpha_pll_round_rate(rate, *prate, &l, &a); + + if (pll->flags & SUPPORTS_DYNAMIC_UPDATE) { + if (rate < pll->min_rate) + rate = pll->min_rate; + else if (rate > pll->max_rate) + rate = pll->max_rate; + return rate; + } + if (alpha_pll_find_vco(pll, rate)) return rate; diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index d6e1ee2..e43a9c0 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -37,8 +37,11 @@ struct clk_alpha_pll { #define SUPPORTS_OFFLINE_REQ BIT(0) #define SUPPORTS_16BIT_ALPHA BIT(1) #define SUPPORTS_FSM_MODE BIT(2) +#define SUPPORTS_DYNAMIC_UPDATE BIT(3) u8 flags; + unsigned long min_rate; + unsigned long max_rate; struct clk_regmap clkr; };